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"a$FreeBSD: head/sys/dev/drm2/i915/dvo_ivch.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_execbuffer.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_bios.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_ringbuffer.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_evict.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_tiling.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_hashtab.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo_sil164.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_fb.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_drv.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_iic.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_atomic.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo_ch7xxx.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_hdmi.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_modes.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_opregion.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_tv.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_pm.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_debug.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drmP.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_drm.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_mem_util.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_sdvo.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo_ch7017.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_context.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_stolen.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_lvds.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_gem_gtt.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_suspend.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_sprite.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_os_freebsd.h 338348 2018-08-28 14:46:55Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_panel.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_ringbuffer.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo_tfp410.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_acpi.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_dp.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_dvo.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_overlay.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_ioc32.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_irq.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_drv.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_linux_list.h 338285 2018-08-24 00:02:00Z imp $FreeBSD clang version 6.0.1 (tags/RELEASE_601/final 335540) (based on LLVM 6.0.1)$FreeBSD: head/sys/dev/drm2/i915/i915_reg.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_ddi.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_crt.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/intel_display.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_mm.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/i915_dma.c 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/drm_sarea.h 338285 2018-08-24 00:02:00Z imp $$FreeBSD: head/sys/dev/drm2/i915/dvo_ns2501.c 338285 2018-08-24 00:02:00Z imp $@dDAd Bd Cd DdEdFdGdHd Id Jd Kd Ld MdNd@Od QdSdTd(UdVdWdXd Yd Zd [d\d ]d ^d _d `d!ad"bd #cd@$dd%ed&fd 'gd,(hd,)id@*kd+kd,ld-md.nd/od0pd1qd2pppppppppppppppOOO0PT4640x480 {@ OOO0OOOOOO0OOOpOOOXB24XR24YUYVYVYUUYVYVYUYXR24YUYVYVYUUYVYVYUY  <<`<p8<@<`H<pX<`<h< x< < < < < < < <@<0<<<<(<0< 8< H<P<Pp<x<`&<p&<&<&<*<0,<-< -<0-<`-<-<-<0<1 <p2@<2H<2P<2`<3h<03<<<` <0@`<pa @<P`<<}t @`jsr @`yw @`u o@p`x#= #= #=  # =0 #( =@ 8 #@ =P P #X =` h #p =p # = # = # = # = # = # =  # = 0 = 8 >H = P >`  h = x = >! =  > = >V =$ >[ =0 > ?( >5 >MV @4 >  >(( 0 >ϲ8 @ >H P >X ` >ih p >^Vx  >_  >L  >2 @, >i  >  >!  >yV  >   = ( >50 =H 8 H >!P ? x d e g f c h   b0 8 P X p x    Z Y >-L >{ >!   P>hDpE<< <0<o<nm<`Y=>=>n  (=8=@>P=X>-h p==>=> ==p>=>d =>R (=0@>!H=`PA(`>Rh?pJ>H=>R>= >!(=@0A0@>RH?0K>hw=>R#=>m A@= 1 1(>[@=H>X=`>.p x=>n=>!=Ap>?`x<P!<! <!<!CH7009A[drm:KMS:pid%d:%s] sil164 not detected got %d: from %s Slave %d. [drm]:KMS:pid%d:%s]SIL164_FREQ_LO: 0x%02x [drm]:KMS:pid%d:%s]TFP410_DE_LIN: 0x%02X%02X has_overlay: %s Old framebuffer gtt_offset 0x%08x Current sequence (%s): %d Pipe %c stat: %08x HEAD: 0x%08x INSTPM: 0x%08x bltpd gtt offset: 0x%08x DPIO_DIV_B: 0x%08x i915_max_freqIntel G43 ?[drm:KMS:pid%d:%s] Context object allocated failed i915_gem_evict_everythingerror: [drm:pid%d:%s] *ERROR* Failed to allocate memory for bit 17 record error: [drm:pid%d:%s] *ERROR* instruction error i915_get_vblank_counter[drm:KMS:pid%d:%s] FDI link training done on step %d error: [drm:pid%d:%s] *ERROR* WRPLL already enabled error: [drm:pid%d:%s] *ERROR* mode_fixup() on unknown output! intel_framebuffer_init[drm:pid%d:%s] pitch (%d) must match tiling stride (%d) [drm:KMS:pid%d:%s] CRTC fixup failed [drm:KMS:pid%d:%s] CRTC:%d allocated PCH PLL %x cpt_enable_fdi_bc_bifurcationerror: [drm:pid%d:%s] *ERROR* WARN ON: I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLEironlake_enable_pch_transcoderintel_modeset_stage_output_state[drm:KMS:pid%d:%s] Status 0x%08x Control 0x%08x intel_dp_init_panel_power_sequencer_registersintel_dp_mode_set[drm:KMS:pid%d:%s] allocated %dx%d (s %dbits) fb: 0x%08x, bo %p [drm:KMS:pid%d:%s] No LVDS modes found, disabling. AOpen i45GMx-I OBUF_1U: 0x%08x YRGB_VPH: 0x%08x SHEIGHT: 0x%08x YRGBSCALE: 0x%08x [drm:KMS:pid%d:%s] Haswell: only RC6 available 3error: [drm:pid%d:%s] *ERROR* timeout waiting for pcode read (%d) to finish [drm:KMS:pid%d:%s] FIFO watermarks For pipe B - plane %d, cursor: %d error: [drm:pid%d:%s] *ERROR* failed to quiesce %s whilst cleaning up: %d error: [drm:pid%d:%s] *ERROR* Failed to map ringbuffer. [drm:KMS:pid%d:%s] %s hws offset: 0x%08x SDVO_CMD_GET_FIRMWARE_REVSDVO_CMD_SET_TARGET_INPUTSDVO_CMD_GET_MAX_SATURATIONSDVO_CMD_GET_CONTRASTSECAM_Kflicker_filter_adaptivech7019[drm]:KMS:pid%d:%s]VR40: 0x%04x [drm]:KMS:pid%d:%s]TFP410_CTL2: 0x%02X [drm]:KMS:pid%d:%s]TFP410_DE_TOP: 0x%02X gen: %d is_i945gm: %s Inactive: Stall check enabled, PM IMR: %08x Interrupt enable: %08x North Display Interrupt mask: %08x RP CUR DOWN: %dus GFXEC: %ld [drm:KMS:pid%d:%s] Manually setting min freq to %d i915_suspendIntel Haswell (CRW GT2 mobile)Intel G45/G43i915_gem_object_pindrmwcoerror: [drm:pid%d:%s] *ERROR* WARN ON: end < 0error: [drm:pid%d:%s] *ERROR* INSTPS: 0x%08x i915_get_extra_instdone[drm:KMS:pid%d:%s] failed to get supported _DSM functions valleyview_crt_detect_hotplugerror: [drm:pid%d:%s] *ERROR* Invalid WRPLL2 refcount intel_ddi_pll_mode_setintel_ddi_set_pipe_settings[drm:KMS:pid%d:%s] reusing fbdev for load-detection framebuffer ADDR: %08x BASE: %08x [drm:KMS:pid%d:%s] [CONNECTOR:%d:%s] [drm:KMS:pid%d:%s] [ENCODER:%d:%s] set [MODE:%d:%s] error: [drm:pid%d:%s] *ERROR* Failed to disable PCH transcoder error: [drm:pid%d:%s] *ERROR* Unknown pixel format 0x%08x [drm:KMS:pid%d:%s] checking fdi config on pipe %i, lanes %i [drm:KMS:pid%d:%s] LPT does not has PCH refclk, skipping check ivb_manual_fdi_link_train[drm:KMS:pid%d:%s] [CONNECTOR:%d:%s] to [CRTC:%d] ironlake_wait_panel_onerror: [drm:pid%d:%s] *ERROR* dp_aux_ch not done status 0x%08x intel_dp_signal_levels_hswerror: [drm:pid%d:%s] *ERROR* DP training pattern 3 not supported intel_fb_restore_modehsw_infoframe_enableintel_lvds_set_property[drm:KMS:pid%d:%s] Public ACPI methods supported error: [drm:pid%d:%s] *ERROR* WARN ON: dev_priv->overlay Register file at 0x%08lx: DCLRKM: 0x%08x [drm:KMS:pid%d:%s] display watermark(%d) is too large(%d), disabling wm%d+ [drm:KMS:pid%d:%s] FIFO watermarks For pipe C - plane %d, cursor: %d [drm:KMS:pid%d:%s] display watermark is too large(%d/%ld), disabling Berror: [drm:pid%d:%s] *ERROR* Failed to ping batch bo error: [drm:pid%d:%s] *ERROR* failed to set %s head to zero ctl %08x head %08x tail %08x start %08x intel_sdvo_ddc_proxySDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORTSDVO_CMD_GET_FLICKER_FILTER[drm:KMS:pid%d:%s] %s: Unknown SDVO output type (0x%02x%02x) intel_sdvo_connector_matches_edidNTSC_4431024x768tfp410_readb[drm]:KMS:pid%d:%s]TFP410_V_RES: 0x%02X%02X min_freqi915_ppgtt_infois_pineview: %s %u purgeable objects, %zu bytes pRC6 [drm:KMS:pid%d:%s] Manually setting max freq to %d is_broadwater,[drm:KMS:pid%d:%s] sarea not found assuming DRI2 userspace i915_flush_ioctlIntel PineviewIntel Pineview (M)agpiicbbi915_write_fence_regi915_gem_object_bind_to_gtti915_gem_context_destroy_ioctl[drm:pid%d:%s] reloc with read/write non-GPU domains: obj %p target %d offset %d read %08x write %08xerror: [drm:pid%d:%s] *ERROR* memory refresh error: [drm:KMS:pid%d:%s] PCH transcoder CRC error interrupt intel_dsm_pci_probe[drm:KMS:pid%d:%s] VBT signature missing [drm:KMS:pid%d:%s] different child size is found. Invalid. intel_crt_detect_ddcintel_ddi_put_crtc_pllerror: [drm:pid%d:%s] *ERROR* WARN ON: !(val & SPLL_PLL_ENABLE)intel_ddi_get_hw_stateerror: [drm:pid%d:%s] *ERROR* Timeout waiting for DDI BUF %c idle bit intel_ddi_get_encoder_port SRC: %08x HTOTAL: %08x error: [drm:pid%d:%s] *ERROR* No FB bound lpt_program_iclkiplpt_enable_pch_transcoderassert_planes_disabledironlake_write_eld[drm:KMS:pid%d:%s] FDI_RX_IIR before link train 0x%x error: [drm:pid%d:%s] *ERROR* we currently only support 64x64 cursors intel_sanitize_encodererror: [drm:pid%d:%s] *ERROR* WARN ON: encoder->connectors_active[drm:KMS:pid%d:%s] Unsupported voltage swing/pre-emphasis level:0x%x intel_dp_detect_dpcdsil164Integrated gfxgmbusintel_gmbus_force_bitGigabyte GA-D525TUDintel_opregion_asle_intr OBUF_0V: 0x%08x [drm:KMS:pid%d:%s] Unknown FSB/MEM found, disable CxSR intel_ring_wait_requestSDVO_CMD_SET_ACTIVE_HOT_PLUGSDVO_CMD_GET_INTERRUPT_EVENT_SOURCESDVO_CMD_GET_INPUT_TIMINGS_PART1SDVO_CMD_GET_HBUF_AV_SPLITSDVO_CMD_SET_HBUF_TXRATEPAL_HSECAM_K1SECAM_60[drm:KMS:pid%d:%s] Detected S-Video TV connection ch7xxx_writebivch_write[drm]:KMS:pid%d:%s]VR80: 0x%04x [drm:KMS:pid%d:%s] %s: set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d). [drm]:KMS:pid%d:%s]TFP410_REV: 0x%02X [drm]:KMS:pid%d:%s]TFP410_DE_CNT: 0x%02X%02X i915_rstdby_delaysDisplay IIR: %08x Graphics Interrupt mask (%s): %08x seqno 0x%08x, emitted %ld, tail 0x%08x IPEIR: 0x%08x RC6 "Locked to RPn" residency since boot: %u FBC unsupported on this chipset MAD_DIMM_C0 = 0x%08x error: [drm:pid%d:%s] *ERROR* Failed to create our workqueue. i915_dump_device_infois_haswell,has_fbc,has_pipe_cxsr,i915_initialize[drm:KMS:pid%d:%s] set status page addr 0x%08x Intel SandyBridge (M)error: [drm:pid%d:%s] *ERROR* WARN ON: i915_gem_object_unbind(obj)i915_gem_object_put_pages_gtti915_gem_execbuffer2intel_dsm_platform_mux_infoDisplayPort_D[drm:KMS:pid%d:%s] Incorrect SDVO port. Skip it [drm:KMS:pid%d:%s] there exists the slave2_addr. Maybe this is a SDVO device with multiple inputs. error: [drm:pid%d:%s] *ERROR* SPLL already enabled [drm:KMS:pid%d:%s] CDCLK running at %dMHz [drm:KMS:pid%d:%s] Pipe %c connected to port %c using clock 0x%08x intel_ddi_mode_fixupintel_pch_rawclk[drm:KMS:pid%d:%s] [CONNECTOR:%d:%s] hw state readout: %s TILEOFF: %08x [drm:KMS:pid%d:%s] Using SSC on panel error: [drm:pid%d:%s] *ERROR* crtc not active NCR Corporationerror: [drm:pid%d:%s] *ERROR* Unexpected PCH type %d intel_put_pch_pllassert_fdi_txironlake_crtc_mode_set[drm:KMS:pid%d:%s] fdi link B uses too many lanes to enable link C intel_disable_pch_plli9xx_get_refclkerror: [drm:pid%d:%s] *ERROR* WARN ON: set->fb && (set->num_connectors == 0)[drm:KMS:pid%d:%s] eDP VDD already on [drm:KMS:pid%d:%s] aux_i2c nack intel_dp_get_hw_stateintelfb_createintel_gmbus_drmnBroadcast RGBerror: [drm:pid%d:%s] *ERROR* failed to attach phys overlay regs error: [drm:pid%d:%s] *ERROR* failed to move overlay register bo into the GTT [drm:KMS:pid%d:%s] more than one pipe active, disabling compression [drm:KMS:pid%d:%s] disabled FBC g4x_disable_fbc[drm:KMS:pid%d:%s] FIFO entries required for mode: %ld SDVO_CMD_GET_MAX_TV_LUMA_FILTERSDVO_CMD_GET_ENCODEintel_sdvo_read_byte[drm:KMS:pid%d:%s] SDVO response %d %d [%x] SECAM_L[drm]:KMS:pid%d:%s] %02X: [drm]:KMS:pid%d:%s]VR84: 0x%04x [drm]:KMS:pid%d:%s]NS2501_REGC: 0x%02x has_pipe_cxsr: %s supports_tv: %s has_bsd_ring: %s yesRender IER: %08x EIR: 0x%08x RP PREV UP: %dus Max P-state: P%d RC1 mode too largevm_lowmemhas_llc,[drm:KMS:pid%d:%s] load hws HWS_PGA with gfx mem 0x%x drm.i915.enable_unsupportedi8xxrst1drmn20080730Intel i915GMi915_gem_init_object called error: [drm:pid%d:%s] *ERROR* Invalid object alignment requested %u [drm:KMS:pid%d:%s] HW context %d destroyed [drm:KMS:pid%d:%s] trying to get scanoutpos for disabled pipe %c LVDS$VBTinit_vbt_defaults[drm:KMS:pid%d:%s] CRT not detected via hotplug DPerror: [drm:pid%d:%s] *ERROR* pipe %c assertion failure (expected %s, current %s) error: [drm:pid%d:%s] *ERROR* no such CRTC id intel_get_pipe_from_crtc_idPipe [%d]: onerror: [drm:pid%d:%s] *ERROR* Can't update pipe %c in SAREA [drm:KMS:pid%d:%s] failed to find PLL for pipe %d [drm:KMS:pid%d:%s] using pll %d for pipe %d error: [drm:pid%d:%s] *ERROR* pin & fence failed error: [drm:pid%d:%s] *ERROR* failed to enable transcoder %d ironlake_disable_pch_transcoderironlake_edp_panel_vdd_on[drm:KMS:pid%d:%s] Turn eDP VDD off %d error: [drm:pid%d:%s] *ERROR* dp_aux_ch receive error status 0x%08x [drm:KMS:pid%d:%s] Branch OUI: %02x%02x%02x intel_dp_set_property[drm:KMS:pid%d:%s] unknown info frame type %d i915 iicbb %s[drm:KMS:pid%d:%s] using current (BIOS) mode: AOpen Mini PC MP915intel_opregion_gse_intr[drm:KMS:pid%d:%s] SWSCI supported OTILEOFF_1Y: 0x%08x error: [drm:pid%d:%s] *ERROR* WARN ON: val > dev_priv->rps.max_delay[drm:KMS:pid%d:%s] unknown fsb frequency 0x%04x intel_calculate_wmi965_update_wminit_pipe_controlSDVO_CMD_GET_CLOCK_RATE_MULTSDVO_CMD_SET_VPOSSDVO_CMD_SET_SATURATIONSDVO_CMD_GET_FLICKER_FILTER_ADAPTIVESDVO_CMD_GET_MAX_TV_CHROMA_FILTERmodeflicker_filter[drm:KMS:pid%d:%s] CH7017_LVDS_PLL_VCO_CONTROL: %02x ch7xxx_init[drm]:KMS:pid%d:%s]VR8F: 0x%04x [drm]:KMS:pid%d:%s]NS2501_REG9: 0x%02x ring_stopintr_pf%u pinned mappable objects, %zu bytes South Display Interrupt mask: %08x Render p-state limit: %d no outputsDPIO_LFP_COEFF_B: 0x%08x drm.i915.powersaveIntel Haswell (CRW GT2 desktop)i915_gem_l3_remapcreate_default_context[drm:pid%d:%s] copy %d exec entries failed %d error: [drm:pid%d:%s] *ERROR* pipe %c stat: 0x%08x error: [drm:pid%d:%s] *ERROR* Hangcheck timer elapsed... %s idle error: [drm:pid%d:%s] *ERROR* Invalid crtc %d [drm:KMS:pid%d:%s] crtc %d is disabled [drm:KMS:pid%d:%s] PCH GMBUS interrupt WiDiNo MUX, iGPU onlyACER ZGBintel_crt_detect_hotplugintel_wait_ddi_buf_idle[drm:KMS:pid%d:%s] WRPLL: %dKHz refresh rate with p=%d, n2=%d r2=%d intel_dpio_readerror: [drm:pid%d:%s] *ERROR* WARN ON: encoder->connectors_active != falseerror: [drm:pid%d:%s] *ERROR* timeout waiting for SBI to complete read transaction info: [drm] Forcing lvds to dual link mode on %s error: [drm:pid%d:%s] *ERROR* plane %c assertion failure, should be disabled but not ironlake_crtc_enablehaswell_write_eld[drm:KMS:pid%d:%s] swapping pipes & planes for FBC error: [drm:pid%d:%s] *ERROR* cursor cannot be tiled ironlake_edp_backlight_on[drm:KMS:pid%d:%s] cur t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d iicbus_intel_gmbusAOpen Mini PC[drm:KMS:pid%d:%s] Illum is not supported [drm:KMS:pid%d:%s] PWM freq is not supported No ACPI video bus found [drm:KMS:pid%d:%s] unsupported config, disabling FBC ironlake_enable_rc6error: [drm:pid%d:%s] *ERROR* failed to pin power context: %d [drm:KMS:pid%d:%s] failed to compute sprite lp1 wm on pipe %d [drm:KMS:pid%d:%s] Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d gen6_enable_rpsintel_cleanup_ring_bufferintel_sdvo_ddc_proxy_drmnSDVO_CMD_GET_MAX_OVERSCAN_VSDVO_CMD_SET_FLICKER_FILTERSDVO_CMD_SET_SHARPNESSNTSC_J[drm:KMS:pid%d:%s] flicker_filter_adaptive: max %d, default %d, current %d intel_tv_detect_type[drm:KMS:pid%d:%s] Detected Composite TV connection 1080i@50HzCH7011[drm]:KMS:pid%d:%s]VR87: 0x%04x sil164_readb[drm]:KMS:pid%d:%s]SIL164_FREQ_HI: 0x%02x [drm]:KMS:pid%d:%s]TFP410_DE_CTL: 0x%02X infoi915_gem_objectsi915_gem_seqnoi915_error_stateis_g4x: %s XNew framebuffer gtt_offset 0x%08x Graphics Interrupt enable: %08x Interrupts received: %d INSTDONE_%d: 0x%08x ERR_INT: 0x%08x TAIL: 0x%08x RC information accurate: %s RS1 VID: %d bit6 swizzle for Y-tiling = %s noneDPIO_CTL: 0x%08x is_valleyview,intel_detect_pcherror: [drm:pid%d:%s] *ERROR* Unknown unclaimed register before writing to %x error: [drm:pid%d:%s] *ERROR* WARN ON: obj->base.write_domain & ~I915_GEM_DOMAIN_CPUerror: [drm:pid%d:%s] *ERROR* WARN ON: obj->base.read_domains & ~I915_GEM_DOMAIN_CPU915pee[drm:pid%d:%s] Relocation not 4-byte aligned: obj %p target %d offset %d. error: [drm:pid%d:%s] *ERROR* WARN ON: readl(>t_entries[i-1]) != pte_encode(dev, addr, level)gen6_ggtt_bind_objectivybridge_parity_workintel_dsmparse_device_mappingerror: [drm:pid%d:%s] *ERROR* Invalid DDI encoder type %d intel_ddi_get_crtc_pll[drm:pid%d:%s] invalid format: 0x%08x error: [drm:pid%d:%s] *ERROR* framebuffer init failed %d intel_crtc_disableerror: [drm:pid%d:%s] *ERROR* bad PCH PLL refcount intel_pipe_set_baseerror: [drm:pid%d:%s] *ERROR* WARN ON: SBI_SSCDIVINTPHASE_DIVSEL(divsel) & ~SBI_SSCDIVINTPHASE_DIVSEL_MASKironlake_check_fdi_laneserror: [drm:pid%d:%s] *ERROR* eDP VDD already requested on [drm:KMS:pid%d:%s] Broken DP branch device, ignoring intel_dp_probe_oui[drm:KMS:pid%d:%s] vbt t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d error: [drm:pid%d:%s] *ERROR* dp pll off, should be on error: [drm:pid%d:%s] *ERROR* bbbus bridge %d attach failed, %d dpdFujitsu Esprimo Q900error: [drm:pid%d:%s] *ERROR* timed out waiting for panel to power on error: [drm:pid%d:%s] *ERROR* failed to pin overlay register bo error: [drm:pid%d:%s] *ERROR* timeout waiting for pcode write (%d) to finish error: [drm:pid%d:%s] *ERROR* GT thread status wait timed out __gen6_gt_force_wake_getSDVO_CMD_SET_IN_OUT_MAPSDVO_CMD_GET_MAX_HPOSSDVO_CMD_SET_PIXEL_REPLI[drm:KMS:pid%d:%s] %s: R: [drm:KMS:pid%d:%s] SDVO capabilities: vendor_id: %d device_id: %d device_rev_id: %d sdvo_version_major: %d sdvo_version_minor: %d sdvo_inputs_mask: %d smooth_scaling: %d sharp_scaling: %d up_scaling: %d down_scaling: %d stall_support: %d output_flags: %d intel_sdvo_detectintel_sdvo_create_enhance_propertyintel_sdvo_create_enhance_property_lvdsNi915_delayfreq_tableis_valleyview: %s (gtt offset: %08x, size: %08x) snooped (LLC+MLC)North Display Interrupt enable: %08x FADDR: 0x%08x PHW control enabled: %s Core Power Down Total power: %ld MAD_DIMM_C2 = 0x%08x PP_DIR_BASE_READ: 0x%08x i915_driver_openhas_overlay,error: [drm:pid%d:%s] *ERROR* Client tried to initialize ringbuffer in GEM mode Intel Haswell (SDV GT1 server)Intel Haswell (CRW GT2 server)915pbs[drm:pid%d:%s] execbuf with %d buffers i915_gem_gtt_initerror: [drm:pid%d:%s] *ERROR* Failed to map the gtt page table error: [drm:pid%d:%s] *ERROR* EIR stuck: 0x%08x, masking [drm:KMS:pid%d:%s] Pageflip stall detected [drm:KMS:pid%d:%s] port id: %s [drm:KMS:pid%d:%s] LVDS downclock is found in VBT. Normal Clock %dKHz, downclock %dKHz error: [drm:pid%d:%s] *ERROR* No WRPLLs available! assert_pipesintel_crtc_clock_get[drm:KMS:pid%d:%s] invalid shared fdi lane config on pipe %i: %i lanes error: [drm:pid%d:%s] *ERROR* WARN ON: pll->active == 0[drm:KMS:pid%d:%s] ELD: DisplayPort detected [drm:KMS:pid%d:%s] disabling fdi C rx error: [drm:pid%d:%s] *ERROR* WARN ON: !connector->new_encoder->new_crtcinfo: [drm] failed to retrieve link info, disabling eDP intel_gen6_edp_signal_levels[drm:pid%d:%s] failed to restore crtc mode error: [drm:pid%d:%s] *ERROR* gmbus bridge %d creation failed Hewlett-Packard st5747audioauto[drm:KMS:pid%d:%s] Pfit is not supported UVSCALEV: 0x%08x warning: [drm] fixme: max PWM is zero intel_panel_get_max_backlight[drm:KMS:pid%d:%s] Failed to get proper latency. Disable CxSR [drm:KMS:pid%d:%s] warning: pcode (read) mailbox access failed g4x_enable_fbcironlake_check_srwm[drm:KMS:pid%d:%s] latency %d is 0, disabling wm%d+ valleyview_update_wm[drm:KMS:pid%d:%s] SR latency is 0, disabling bsd ring[drm:KMS:pid%d:%s] No SDVO device found on %s SDVO_CMD_GET_ACTIVE_OUTPUTSSDVO_CMD_SET_BRIGHTNESSSDVO_CMD_GET_MAX_FLICKER_FILTERintel_enable_sdvointel_sdvo_get_capabilitiesintel_sdvo_output_setuptv_luma_filterintel_tv_init[drm:KMS:pid%d:%s] TV detected: %x, %x PAL-M[drm:KMS:pid%d:%s] %s: switching to 1024x768 [drm]:KMS:pid%d:%s]TFP410_DE_DLY: 0x%02X wedgedmax_freqhas_force_wake: %s SYNC_1: 0x%08x [last synced 0x%08x] RC6 voltage: %dmV i915_ring_stoperror: [drm:pid%d:%s] *ERROR* Batchbuffer ioctl disabled 915error: [drm:pid%d:%s] *ERROR* alignmentis_i945gm,is_crestline,i915_dispatch_flipi915_vblank_pipe_geterror: [drm:pid%d:%s] *ERROR* Reset not implemented, but ignoring error for simulated gpu hangs Intel Haswell (GT2 server)Intel Haswell (SDV GT1 mobile)Intel i845G GMCHIntel i945Gerror: [drm:pid%d:%s] *ERROR* failed to init phys object %d size: %zu [drm:pid%d:%s] execbuf with unknown ring: %d [drm:pid%d:%s] execbuf with invalid ring: %d [drm:KMS:pid%d:%s] GMADR size = %dM do_idlingi915_gem_init_stolenerror: [drm:pid%d:%s] *ERROR* WARN ON: ring->id != RCSerror: [drm:pid%d:%s] *ERROR* IPEIR: 0x%08x error: [drm:pid%d:%s] *ERROR* Unsupported platform i915_get_vblank_timestamp[drm:KMS:pid%d:%s] PCH audio power change on port %d ThinkCentre A57[drm:KMS:pid%d:%s] BDB_GD too small (%d). Invalid. SDVOBerror: [drm:pid%d:%s] *ERROR* DPIO read wait timed out SURF: %08x [drm:pid%d:%s] unsupported depth, assuming 24 bits lpt_disable_pch_transcodererror: [drm:pid%d:%s] *ERROR* Can't update plane %d in SAREA error: [drm:pid%d:%s] *ERROR* WARN ON: pll->refcount == 0[drm:KMS:pid%d:%s] disabling CxSR downclocking [drm:KMS:pid%d:%s] Audio directed to unknown port intel_crtc_cursor_setintel_crtc_page_flip[drm:KMS:pid%d:%s] probing SDVOC [drm:KMS:pid%d:%s] Turn eDP VDD on [drm:KMS:pid%d:%s] i2c_init %s g4x_infoframe_indexerror: [drm:pid%d:%s] *ERROR* bbbus bridge %d creation failed error: [drm:pid%d:%s] *ERROR* gmbus bridge doesn't have iicbus child dpcintel_gmbus/iicbusintel_find_lvds_downclockforce-dvi[drm:KMS:pid%d:%s] opregion signature mismatch DWINSZ: 0x%08x intel_overlay_continueintel_enable_fbcironlake_set_drps[drm:KMS:pid%d:%s] warning: pcode (write) mailbox access failed i8xx_enable_fbcg4x_check_srwm[drm:KMS:pid%d:%s] Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d error: [drm:pid%d:%s] *ERROR* WARN ON: ring->last_retired_head == -1gen6_bsd_ring_write_tailSDVO_CMD_SET_OUTPUT_TIMINGS_PART1SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGESECAM_Dtv_chroma_filterns2501_mode_validi915_fbc_statusneed_gfx_hws: %s is_ivybridge: %s Active: Display IMR: %08x ERROR: 0x%08x %s --- gtt_offset = 0x%08x not enough stolen memorymultiple pipes are enabledfbcon size: %d x %d, depth %d, %d bpp, obj power context error: [drm:pid%d:%s] *ERROR* i915_dispatch_cmdbuffer failed drm.i915.vbt_sdvo_panel_typei915Intel Haswell (SDV GT1 desktop)error: [drm:pid%d:%s] *ERROR* WARN ON: i915_gem_object_unbind(obj) == -ERESTARTSYSerror: [drm:pid%d:%s] *ERROR* Attempting to bind a purgeable object [drm:pid%d:%s] Ring %s doesn't support contexts error: [drm:pid%d:%s] *ERROR* unknown tiling mode i915_capture_error_state[drm:KMS:pid%d:%s] MUX info connectors: %lld No MUX, dGPU only[drm:KMS:pid%d:%s] Falling back to manually reading VBT from VBIOS ROM for %s [drm:KMS:pid%d:%s] CRT not detected via DDC:0x50 [no valid EDID found] [drm:KMS:pid%d:%s] Using WRPLL 2 on pipe %c error: [drm:pid%d:%s] *ERROR* %d bpp unsupported by DDI function [drm:KMS:pid%d:%s] Initializing DDI buffers for port %c in %s mode [drm:KMS:pid%d:%s] [ENCODER:%d:%s] error: [drm:pid%d:%s] *ERROR* encoder's computed active state doesn't match tracked active state (expected %i, found %i) VTOTAL: %08x STRIDE: %08x [drm:KMS:pid%d:%s] failed to downclock LVDS! error: [drm:pid%d:%s] *ERROR* WARN ON: I915_READ(PIPECONF(intel_crtc->cpu_transcoder)) & (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE)ironlake_get_refclkironlake_set_pll_edpassert_pllassert_fdi_tx_pll_enablederror: [drm:pid%d:%s] *ERROR* transcoder assertion failed, should be off on pipe %c but is still active assert_pch_pllerror: [drm:pid%d:%s] *ERROR* PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled [drm:KMS:pid%d:%s] disabling PCH PLL %x error: [drm:pid%d:%s] *ERROR* DPIO write wait timed out [drm:KMS:pid%d:%s] HDMI audio: eld vld status=0x%8x intel_dp_mode_fixupintel_dp_i2c_initerror: [drm:pid%d:%s] *ERROR* too many retries, giving up ibx_write_infoframeintel_iicbbintel_gmbusdrmn/intel_gmbusreservedApple Mac Mini (Core series)Limited 16:235 OSTRIDE: 0x%08x SWIDTH: 0x%08x [drm:KMS:pid%d:%s] plane not 0, disabling compression intel_init_pmintel_alloc_context_page[drm:KMS:pid%d:%s] Self-refresh is enabled [drm:KMS:pid%d:%s] Self-refresh is disabled [drm:KMS:pid%d:%s] FIFO size - (0x%08x) %s: %d Scaling not supported[drm:KMS:pid%d:%s] vpos: max %d, default %d, current %d flicker_filter_2d[drm:KMS:pid%d:%s] Detected %s chipset, vendor/device ID 0x%02x/0x%02x ivch_dump_regsi915_gem_framebufferis_mobile: %s (pinned x %d) (display)Reserved fences = %d PM IIR: %08x DPFLIPSTAT: %08x %08x : %08x INSTDONE: 0x%08x BBADDR: 0x%08jx renderMax non-overclocked (RP0) frequency: %dMHz INTTOEXT%02d: 0x%08x Current RC state: C0DRB3 = 0x%04x aliasing PPGTT: [drm:KMS:pid%d:%s] Stopping rings 0x%08x i915_cmdbuffererror: [drm:pid%d:%s] *ERROR* bridge device not found drm.i915.modesetdrm.i915.lvds_channel_modedrm.i915.intel_iommu_gfx_mappedIntel IvyBridgeIntel Haswell (ULT GT2 mobile)iicbus[drm:KMS:pid%d:%s] Clearing remapped register [drm:pid%d:%s] execbuf2 with %d buffers [drm:pid%d:%s] Object %p [handle %d, index %d] appears more than once in object list [drm:pid%d:%s] Write domain conflict: obj %p target %d offset %d new %08x old %08x i915_report_and_clear_eir[drm:KMS:pid%d:%s] trying to get vblank count for disabled pipe %c [drm:KMS:pid%d:%s] timed out waiting for FORCE_DETECT to go off[drm:KMS:pid%d:%s] trigger hotplug detect cycle: adpa=0x%x error: [drm:pid%d:%s] *ERROR* Invalid WRPLL1 refcount error: [drm:pid%d:%s] *ERROR* CDCLK source is not LCPLL intel_cpt_verify_modeseterror: [drm:pid%d:%s] *ERROR* encoder's enabled state mismatch (expected %i, found %i) error: [drm:pid%d:%s] *ERROR* active encoder's pipe doesn't match(expected %i, found %i) intel_set_modeerror: [drm:pid%d:%s] *ERROR* Couldn't find PLL settings for mode! [drm:KMS:pid%d:%s] clamping display bpc (was %d) to eDP (%d) [drm:KMS:pid%d:%s] forcing bpc to 8 for HDMI [drm:KMS:pid%d:%s] enabling fdi C rx DPDDC-Aerror: [drm:pid%d:%s] *ERROR* Invalid port %c [drm:KMS:pid%d:%s] dp_aux_ch timeout status 0x%08x [drm:KMS:pid%d:%s] No pipe for dp port 0x%x found ivch[drm:KMS:pid%d:%s] Enabling HDMI audio on pipe %c [drm:KMS:pid%d:%s] GMBUS [%s] timed out waiting for idle Hewlett-Packard t5745 OSTART_1Y: 0x%08x OTILEOFF_0V: 0x%08x [drm:KMS:pid%d:%s] cursor watermark(%d) is too large(%d), disabling wm%d+ [drm:KMS:pid%d:%s] FIFO watermark level: %ld __gen6_gt_wait_for_thread_c0error: [drm:pid%d:%s] *ERROR* WARN ON: ring->space < n[drm:KMS:pid%d:%s] %s: W: %02X SDVO_CMD_GET_OVERSCAN_HSDVO_CMD_GET_TV_LUMA_FILTERPAL_Itop_margin[drm:KMS:pid%d:%s] v_overscan: max %d, default %d, current %d vpos[drm:KMS:pid%d:%s] saturation: max %d, default %d, current %d [drm:KMS:pid%d:%s] dot crawl: current %d NTSC-443800x600[drm:KMS:pid%d:%s] %s: is mode valid (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d) tfp410_writebi915_context_statuscursor_needs_physical: %s P uncachedFlip pending (waiting for vsync) on pipe %c (plane %c) IER: 0x%08x IPEHR: 0x%08x Starting frequency: P%d unsupported on this chipset TILECTL = 0x%08x 915rpsi915_dispatch_cmdbufferi915_emit_irqis_g4x,intel_gpu_resetdrm.i915.panel_use_sscerror: [drm:pid%d:%s] *ERROR* WARN ON: !i915_gem_valid_gtt_space(dev, node, obj->cache_level)info: [drm] BLT not supported on this pre-production hardware; graphics performance will be degraded. error: [drm:pid%d:%s] *ERROR* ACTHD: 0x%08x error: [drm:pid%d:%s] *ERROR* Hangcheck timer elapsed... GPU hung [drm:KMS:pid%d:%s] no _DSM method for intel device [drm:KMS:pid%d:%s] BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d intel_prepare_ddi_buffers[drm:KMS:pid%d:%s] DP audio on pipe %c on DDI error: [drm:pid%d:%s] *ERROR* DPIO idle wait timed out [drm:pid%d:%s] pitch (%d) must be at least 64 byte aligned [drm:KMS:pid%d:%s] [ENCODER:%d:%s] hw state readout: %s, pipe=%i error: [drm:pid%d:%s] *ERROR* encoder not enabled info: [drm] applying pipe a force quirk intel_choose_pipe_bpp_dither[drm:KMS:pid%d:%s] Dithering DP to 6bpc [drm:KMS:pid%d:%s] FDI train done error: [drm:pid%d:%s] *ERROR* failed to restore config after modeset failure [drm:KMS:pid%d:%s] clock recovery OK intel_dp_init_connector[drm:KMS:pid%d:%s] Wait for panel power off time [drm:KMS:pid%d:%s] GMBUS [%s] timed out after NAK [drm:KMS:pid%d:%s] GMBUS [%s] NAK for addr: %04x %c(%d) info: [drm] Skipping LVDS initialization for %s intel_overlay_put_imageintel_overlay_attrs SCLRKVH: 0x%08x [drm:KMS:pid%d:%s] scheduling delayed FBC enable [drm:KMS:pid%d:%s] mode too large for compression, disabling error: [drm:pid%d:%s] *ERROR* stuck trying to change perf mode ironlake_enable_fbci9xx_update_wmi85x_get_fifo_size__gen6_gt_force_wake_mt_getblitter ringSDVO_CMD_SET_ACTIVE_OUTPUTSSDVO_CMD_SET_TV_FORMATSDVO_CMD_GET_SDTV_RESOLUTION_SUPPORTSDVO_CMD_SET_HBUF_INDEXPAL_MPAL_NC[drm:KMS:pid%d:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT: %02x [drm:KMS:pid%d:%s] CH7017_ACTIVE_INPUT_LINE_OUTPUT: %02x [drm]:KMS:pid%d:%s]VR82: 0x%04x [drm:KMS:pid%d:%s] tfp410 not detected got VID %X: from %s Slave %d. [drm]:KMS:pid%d:%s]TFP410_H_RES: 0x%02X%02X cache_sharingpch: %d %u [%u] active objects, %zu [%zu] bytes (fence: %d)Display IER: %08x South Display Interrupt enable: %08x ACTHD: 0x%08x RC information inaccurate because somebody holds a forcewake reference Core Power Down: %s HD boost: %s error: [drm:pid%d:%s] *ERROR* failed to idle hardware: %d need_gfx_hws,info: [drm] MTRR allocation failed. Graphics performance may suffer. error: [drm:pid%d:%s] *ERROR* WARN ON: !(IS_GEN6(dev) || IS_IVYBRIDGE(dev))[drm:KMS:pid%d:%s] Found LynxPoint PCH drm.i915.lvds_downclockdrm.i915.enable_hangcheckIntel Haswell (ULT GT1 mobile)Intel i965QIntel Q33Intel i965GM[drm:pid%d:%s] can not change the cache level of pinned objects i915_gem_detect_bit_6_swizzlei915_error_first_batchbuffererror: [drm:pid%d:%s] *ERROR* Kicking stuck wait on %s i915_hotplug_work_funcAnalog VGA[drm:KMS:pid%d:%s] No general definition block is found, unable to construct sdvo mapping. error: [drm:pid%d:%s] *ERROR* WARN ON: !(val & WRPLL_PLL_ENABLE)[drm:KMS:pid%d:%s] Disabling WRPLL 2 [drm:KMS:pid%d:%s] Preparing DDI mode for Haswell on port %c, pipe %c intel_wait_for_pipe_off[drm:KMS:pid%d:%s] set mode pipe masks: modeset: %x, prepare: %x, disable: %x VBLANK: %08x assert_panel_unlockederror: [drm:pid%d:%s] *ERROR* WARN ON: I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLEintel_setup_outputs[drm:KMS:pid%d:%s] DP link bw %02x lane count %d clock %d bpp %d error: [drm:pid%d:%s] *ERROR* failed to train DP, aborting ironlake_panel_vdd_off_syncintel_gen7_edp_signal_levels[drm:KMS:pid%d:%s] Enabling DP audio on pipe %c error: [drm:pid%d:%s] *ERROR* HDMI port enabled, expecting disabled cpt_write_infoframe[drm:KMS:pid%d:%s] max backlight PWM = %d [drm:KMS:pid%d:%s] fbc set to per-chip default gen6_gt_check_fifodbgi915_gt_lock[drm:KMS:pid%d:%s] cursor watermark is too large(%d/%ld), disabling SDVO_CMD_GET_HUESDVO_CMD_SET_TV_LUMA_FILTERright_marginNTSC-M[drm:KMS:pid%d:%s] CH7017_LVDS_POWER_DOWN: %02x [drm:KMS:pid%d:%s] Unable to write register 0x%02x to %s:%d. [drm:KMS:pid%d:%s] %s: Trying set the dpms of the DVO to %i [drm:KMS:pid%d:%s] init sil164 dvo controller successfully! [drm]:KMS:pid%d:%s]SIL164_REG9: 0x%02x tfp410_initi915_gem_fence_regsi915_swizzle_infono%u [%u] objects, %zu [%zu] bytes in gtt snooped (LLC)Graphics Interrupt mask: %08x no error state collected Requested VID: %d Current VID: %d Render p-state VID: %d RP CUR UP EI: %dus RS1 i915_write32i8xxrst2error: [drm:pid%d:%s] *ERROR* drm/i915 can't work without intel_agp module! Intel Haswell (ULT GT1 desktop)error: [drm:pid%d:%s] *ERROR* WARN ON: obj->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNTi915_gem_unpin_ioctlerror: [drm:pid%d:%s] *ERROR* WARN ON: ret != -EIOi915_gem_context_create_ioctl[drm:pid%d:%s] execbuf with invalid offset/length [drm:pid%d:%s] clip rectangles are only valid on pre-gen5 i915_hangcheck_hungcpt_irq_handlerDisplayPort_ASDVOCparse_edpintel_crt_detect[drm:KMS:pid%d:%s] timed out waiting for FORCE_TRIGGERerror: [drm:pid%d:%s] *ERROR* FDI link training failed! error: [drm:pid%d:%s] *ERROR* Unsupported lane count %d [drm:KMS:pid%d:%s] failed to allocate framebuffer for load-detection [drm:KMS:pid%d:%s] failed to set mode on load-detect pipe intel_release_load_detect_pipeintel_encoder_check_is_clonedironlake_wait_for_vblank[drm:KMS:pid%d:%s] Encoder fixup failed intel_modeset_adjusted_mode[drm:KMS:pid%d:%s] using SSC reference clock of %d MHz [drm:KMS:pid%d:%s] CRTC:%d reusing existing PCH PLL %x error: [drm:pid%d:%s] *ERROR* PLL state assertion failure (expected %s, current %s) [drm:KMS:pid%d:%s] enable PCH PLL %x (active %d, on? %d)for crtc %d error: [drm:pid%d:%s] *ERROR* DPLL %d failed to lock vlv_update_pll[drm:KMS:pid%d:%s] FDI train 1 done. [drm:KMS:pid%d:%s] cursor off intel_crtc_set_configintel_pch_pll_init[drm:KMS:pid%d:%s] [CRTC:%d] wrong plane connection detected! intel_dp_aux_cherror: [drm:pid%d:%s] *ERROR* WARN ON: dp_reg & DP_PORT_ENintel_iicbb/iicbb[drm:KMS:pid%d:%s] using mode from VBT: MSI Wind Box DC500 OBUF_0Y: 0x%08x error: [drm:pid%d:%s] *ERROR* WARN ON: val < dev_priv->rps.min_delay[drm:KMS:pid%d:%s] Setting FIFO watermarks - A: plane=%d, cursor=%d, B: plane=%d, cursor=%d, SR: plane=%d, cursor=%d [drm:KMS:pid%d:%s] self-refresh entries: %d, wm: %d render ringSDVO_CMD_GET_DEVICE_CAPSSDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTSSDVO_CMD_GET_SUPPORTED_ENHANCEMENTSSDVO_CMD_SET_FLICKER_FILTER_ADAPTIVESDVO_CMD_GET_DOT_CRAWLSDVO_CMD_SET_COLORIMETRYSDVO_CMD_SET_HBUF_AV_SPLITNTSC_M[drm:KMS:pid%d:%s] h_overscan: max %d, default %d, current %d [drm]:KMS:pid%d:%s]VR85: 0x%04x ns2501_readbns2501_dump_regs[drm:KMS:pid%d:%s] tfp410 not detected got DID %X: from %s Slave %d. %u objects, %zu bytes DPINVGTT: %08x DONE_REG: 0x%08x bsdBoost freq: %d Render standby enabled: %s user size: %d x %d, depth %d, %d bpp, obj render context unknowninfo: [drm] Manually setting wedged to %d i915_getparamis_g33,info: [drm] failed to find VBIOS tables error: GEM idle failed, resume might fail Intel GraphicsIntel Haswell (GT2 desktop)Intel i915GIntel i965Gi915_gem_object_set_cache_levelerror: [drm:pid%d:%s] *ERROR* Attempting to bind an object larger than the aperture [drm:pid%d:%s] Failed to allocate exec list for %d buffers error: [drm:pid%d:%s] *ERROR* First entry = %d; Num entries = %d (max=%d) XXXKIBerror: [drm:pid%d:%s] *ERROR* render error detected, EIR: 0x%08x error: [drm:pid%d:%s] *ERROR* INSTDONE_%d: 0x%08x [drm:KMS:pid%d:%s] Found SDVO panel mode in BIOS VBT tables: info: [drm] Skipping CRT initialization for %s intel_ddi_pre_enableerror: [drm:pid%d:%s] *ERROR* Y tiled not allowed for scan out buffers POS: %08x error: [drm:pid%d:%s] *ERROR* plane %c assertion failure (expected %s, current %s) [drm:KMS:pid%d:%s] failed to upclock LVDS! info: [drm] applying lvds SSC disable quirk Apple MacBook Pro (Core i5/i7 Series)[drm:KMS:pid%d:%s] [CONNECTOR:%d:%s] to [NOCRTC] error: [drm:pid%d:%s] *ERROR* eDP VDD not forced onintel_dp_sink_dpms[drm:KMS:pid%d:%s] too many voltage retries, give up intel_dp_complete_link_trainerror: [drm:pid%d:%s] *ERROR* WARN ON: !intel_encoder->base.crtcintel_dp_i2c_aux_chClientron E830[drm:KMS:pid%d:%s] graphic opregion physical addr: 0x%x _DOS OBUF_1V: 0x%08x SCLRKVL: 0x%08x intel_init_power_wellserror: [drm:pid%d:%s] *ERROR* WARN ON: loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIESsandybridge_update_wm[drm:KMS:pid%d:%s] failed to compute sprite wm for pipe %d i830_get_fifo_sizeSDVO_CMD_GET_TRAINED_INPUTSSDVO_CMD_GET_ACTIVE_HOT_PLUGSDVO_CMD_GET_MAX_FLICKER_FILTER_2DSDVO_CMD_SET_FLICKER_FILTER_2DInvalid arghposPAL-N480p[drm:KMS:pid%d:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT: %02x ns2501_dpms[drm:KMS:pid%d:%s] %s: switching to 800x600 [drm]:KMS:pid%d:%s]TFP410_USERCFG: 0x%02X i915_cur_delayinfois_i85x: %s is_g33: %s (name: %d)Requested P-state: %d %d %d scanout buffer not tiledforcewake count = %u has_bsd_ring,i915_wait_irqerror: [drm:pid%d:%s] *ERROR* Attempting to mmap a purgeable buffer i915_gem_pager_populatedrmcompl[drm:pid%d:%s] clip rectangles are only valid with the render ring error: [drm:pid%d:%s] *ERROR* Unknown GMADR entries (%d) [drm:KMS:pid%d:%s] PCH HDCP audio interrupt intel_no_opregion_vbt_callback[drm:KMS:pid%d:%s] No general definition block is found, no devices defined. [drm:KMS:pid%d:%s] no child dev is parsed from VBT intel_crt_load_detectintel_get_load_detect_pipe[drm:KMS:pid%d:%s] [CRTC:%d] HSYNC: %08x lpt_init_pch_refclk[drm:KMS:pid%d:%s] upclocking LVDS intel_increase_pllclockhaswell_crtc_mode_seterror: [drm:pid%d:%s] *ERROR* PCH PLL state for reg %x assertion failure (expected %s, current %s), val=%08x assert_pch_dp_disablederror: [drm:pid%d:%s] *ERROR* IBX PCH hdmi port still using transcoder B [drm:KMS:pid%d:%s] FDI train done. error: [drm:pid%d:%s] *ERROR* failed to move cursor bo into the GTT [drm:KMS:pid%d:%s] eDP power already on [drm:KMS:pid%d:%s] too many full retries, give up [drm:KMS:pid%d:%s] panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x g4x_infoframe_enableAsus EeeBox PC EB1007[drm:KMS:pid%d:%s] applying panel-fitter: %x, %x More than 8 outputs detected Overlay, status: 0x%08x, interrupt: 0x%08x OCLRC1: 0x%08x [drm:KMS:pid%d:%s] no output, disabling sandybridge_pcode_readintel_cancel_fbc_worki915_ironlake_get_mem_freq[drm:KMS:pid%d:%s] sprite watermarks For pipe %d - %d error: [drm:pid%d:%s] *ERROR* Timed out waiting for forcewake old ack to clear. vlv_force_wake_geterror: [drm:pid%d:%s] *ERROR* Failed to allocate batch bo error: [drm:pid%d:%s] *ERROR* %s initialization failed ctl %08x head %08x tail %08x start %08x SDVO_CMD_GET_OUTPUT_TIMINGS_PART1SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGESDVO_CMD_GET_HPOS[drm:KMS:pid%d:%s] i2c transfer returned %d [drm:KMS:pid%d:%s] hpos: max %d, default %d, current %d [drm:KMS:pid%d:%s] tv_luma_filter: max %d, default %d, current %d [drm:KMS:pid%d:%s] Unrecognised TV connection 720p@60Hz1280x1024[drm]:KMS:pid%d:%s]%02X Ioverlay_needs_physical: %s DERRMR: 0x%08x Render p-state ratio: %d Nominal (RP1) frequency: %dMHz C1DRB3 = 0x%04x bugi915_batchbuffer915fpis_pineview,has_hotplug,[drm:KMS:pid%d:%s] failed bus alloc [drm:KMS:pid%d:%s] Found Ibex Peak PCH i915_gem_context_init[drm:pid%d:%s] failed to copy %d exec entries back to user (%d) taking over the fictitious range 0x%jx-0x%jx [drm:KMS:pid%d:%s] GTT stolen size = %dM i915_ggtt_clear_range[drm:KMS:pid%d:%s] out of memory, not capturing error state error: [drm:pid%d:%s] *ERROR* PCH poison interrupt i915_pageflip_stall_checkintel_crt_reset[drm:KMS:pid%d:%s] valleyview hotplug adpa=0x%x, result %d [drm:KMS:pid%d:%s] CRT GMBUS EDID read failed, retry using GPIO bit-banging error: [drm:pid%d:%s] *ERROR* connector's staged encoder doesn't match current encoder [drm:pid%d:%s] hardware does not support tiling Y Num Pipes: %d error: [drm:pid%d:%s] *ERROR* timeout waiting for SBI to complete write transaction error: [drm:pid%d:%s] *ERROR* %d connectors attached to pipe %c 915flpassert_fdi_rx_pll_enabled[drm:KMS:pid%d:%s] iCLKIP clock: found settings for %dKHz refresh rate: auxdiv=%x, divsel=%x, phasedir=%x, phaseinc=%x error: [drm:pid%d:%s] *ERROR* FDI TX state assertion failure (expected %s, current %s) error: [drm:pid%d:%s] *ERROR* PCH refclk assertion failure, should be active but is disabled ironlake_fdi_link_train[drm:KMS:pid%d:%s] flip queue: crtc already busy [drm:KMS:pid%d:%s] probing DP_D [drm:KMS:pid%d:%s] [ENCODER:%d:%s] has active connectors but no active pipe! [drm:KMS:pid%d:%s] [CRTC:%d] hw state adjusted, was %s, now %s [drm:KMS:pid%d:%s] Turn eDP power off [drm:KMS:pid%d:%s] aux_i2c defer error: [drm:pid%d:%s] *ERROR* failed to allocate framebuffer [drm:KMS:pid%d:%s] %sabling bit-banging on %s. force bit now %d gmbus_xferintel_iicbb_drmnintel_lvds_initIntelGraphicsMem[drm:pid%d:%s] overlay underrun, DOVSTA: %x error: [drm:pid%d:%s] *ERROR* Error enabling power well %lx info: [drm] failed to find known CxSR latency (found ddr%s fsb freq %d, mem freq %d), disabling CxSR [drm:KMS:pid%d:%s] enabled FBC, pitch %d, yoff %d, plane %d, [drm:KMS:pid%d:%s] DSPFW1 register is %x [drm:KMS:pid%d:%s] DSPFW3 register is %x [drm:KMS:pid%d:%s] FIFO watermarks - A: %d, B: %d i845_get_fifo_sizeerror: [drm:pid%d:%s] *ERROR* timed out waiting for the BSD ring to wake up SDVO_CMD_SET_ENCODER_POWER_STATESDVO_CMD_SET_HPOSSDVO_CMD_GET_SHARPNESSSDVO_CMD_GET_AUDIO_STATSDVO_CMD_GET_HBUF_DATAerror: [drm:pid%d:%s] *ERROR* cannot create ddc proxy bus %d error: [drm:pid%d:%s] *ERROR* cannot attach proxy bus %d error %d intel_sdvo_read_response[drm:KMS:pid%d:%s] Integrated TV is not present. i915_gem_interruptRender IIR: %08x CCID: 0x%08x FAULT_REG: 0x%08x ring->tail: 0x%08x RP CUR UP: %dus RP CUR DOWN EI: %dus on RC3 RC6 residency since boot: %u RC3 (RC6+) Chipset power: %ld enabledMAD_DIMM_C1 = 0x%08x bit9[drm:KMS:pid%d:%s] %s error: [drm:pid%d:%s] *ERROR* Can not find hardware status page [drm:KMS:pid%d:%s] %s: page=%d pfCurrentPage=%d [drm:KMS:pid%d:%s] Found CougarPoint PCH i915_probeIntel IronLakeIntel Haswell (GT2 mobile)Intel Haswell (ULT GT2 server)info: [drm] Memory usable by graphics device = %dM error: [drm:pid%d:%s] *ERROR* IPEHR: 0x%08x [drm:KMS:pid%d:%s] running encoder hotplug functions [drm:KMS:pid%d:%s] pch crt adpa set to 0x%x [drm:KMS:pid%d:%s] Disabling WRPLL 1 VSYNC: %08x error: [drm:pid%d:%s] *ERROR* timeout waiting for SBI to become ready error: [drm:pid%d:%s] *ERROR* active connector not linked to encoder [drm:KMS:pid%d:%s] forcing bpc to 12 for HDMI haswell_crtc_enableerror: [drm:pid%d:%s] *ERROR* Failed to enable PCH transcoder [drm:KMS:pid%d:%s] disable PCH PLL %x (active %d, on? %d) for crtc %d intel_dpio_writeerror: [drm:pid%d:%s] *ERROR* failed to set mode on [CRTC:%d] intel_sanitize_crtc[drm:KMS:pid%d:%s] Turn eDP power on ironlake_edp_panel_onerror: [drm:pid%d:%s] *ERROR* Panel status timeout: status %08x control %08x intel_dp_set_link_trainironlake_edp_pll_offdisi915 gmbus %sssc[drm:KMS:pid%d:%s] LVDS is not present in VBT Hewlett-Packard HP t5740e Thin Client OCLRC0: 0x%08x OSTART_0V: 0x%08x OSTART_1V: 0x%08x intel_overlay_onintel_panel_actually_set_backlight[drm:KMS:pid%d:%s] mode incompatible with compression, disabling 2[drm:KMS:pid%d:%s] memory self refresh enabled error: [drm:pid%d:%s] *ERROR* GT fifo had a previous error %x error: [drm:pid%d:%s] *ERROR* WARN ON: dev_priv->rps.pm_iir != 0intel_render_ring_init_dri[drm:KMS:pid%d:%s] SDVO output failed to setup on %s SDVO_CMD_CREATE_PREFERRED_INPUT_TIMINGSDVO_CMD_GET_BRIGHTNESSPAL_Bdot_crawl[drm:KMS:pid%d:%s] Detected Component TV connection [drm:KMS:pid%d:%s] Unable to read register 0x%02x from %s:%02x. ivch_readenable_dvons2501_mode_set[drm]:KMS:pid%d:%s]SIL164_REGC: 0x%02x i915_dpiounusedPipe %c stat: %08x North Display Interrupt identity: %08x GT_PERF_STATUS: 0x%08x CAGF: %dMHz RC1e Enabled: %s Deep RC6 Enabled: %s Min P-state: P%d mode not supportedECOCHK: 0x%08x DPIO_LFP_COEFF_A: 0x%08x [drm:KMS:pid%d:%s] Manually setting uncore sharing to %d error: [drm:pid%d:%s] *ERROR* %s called without lock held, held %d owner %p %p has_blt_ring,error: [drm:pid%d:%s] *ERROR* EBUSY -- rec: %d emitted: %d i915_setparamerror: [drm:pid%d:%s] *ERROR* WARN ON: !IS_GEN5(dev)i915_gem_mmap_gtterror: [drm:pid%d:%s] *ERROR* Timed out waiting for the gpu reset to complete %s: page %p failed exclusive busying[drm:pid%d:%s] execbuf with unknown constants: %d [drm:pid%d:%s] execbuf with %u cliprects info: [drm] capturing error event; look for more information in sysctl hw.dri.%d.info.i915_error_state error: [drm:pid%d:%s] *ERROR* PGTBL_ER: 0x%08x [drm:KMS:pid%d:%s] hpd mux info: %s bad type[drm:KMS:pid%d:%s] CRT detected via DDC:0x50 [EDID] error: [drm:pid%d:%s] *ERROR* Invalid SPLL refcount error: [drm:pid%d:%s] *ERROR* Link bandwidth %d unsupported intel_write_elderror: [drm:pid%d:%s] *ERROR* active encoder with no crtc [drm:KMS:pid%d:%s] [CRTC:%d] hw state readout: %s error: [drm:pid%d:%s] *ERROR* FDI mPHY reset assert timeout intel_sbi_readerror: [drm:pid%d:%s] *ERROR* encoder active on the wrong pipe intel_crtc_mode_setironlake_update_planeironlake_enable_pch_pll[drm:KMS:pid%d:%s] ELD size %d ivb_modeset_global_resources[drm:KMS:pid%d:%s] probing HDMI on SDVOC error: [drm:pid%d:%s] *ERROR* WARN ON: crtc->activeintel_dp_check_link_statusDPDDC-Bironlake_edp_pll_onns2501hsw_infoframe_data_regintel_setup_gmbus[drm:KMS:pid%d:%s] disable LVDS for eDP support OBUF_1Y: 0x%08x OTILEOFF_1U: 0x%08x [drm:KMS:pid%d:%s] unknown memory frequency 0x%02x [drm:KMS:pid%d:%s] Couldn't check for BIOS workaround [drm]:KMS:pid%d:%s](%02X)SDVO_CMD_GET_ATTACHED_DISPLAYSSDVO_CMD_GET_TV_FORMATSDVO_CMD_SET_ENCODESDVO_CMD_SET_HBUF_DATASuccessch7017_initch7xxx_dump_regs[drm]:KMS:pid%d:%s]NS2501_REG8: 0x%02x [drm]:KMS:pid%d:%s]SIL164_REG8: 0x%02x [drm]:KMS:pid%d:%s]TFP410_CTL3: 0x%02X Ahas_blt_ring: %s p%s requests: %s --- ringbuffer = 0x%08x i915_error_state_writeLowest (RPN) frequency: %dMHz Gated voltage change: %s RS2 (RC6) unknown GMCH temp: %ld bit9/bit17[drm:KMS:pid%d:%s] i915 batchbuffer, start %x used %d cliprects %d [drm:KMS:pid%d:%s] i915 cmdbuffer, buf %p sz %d cliprects %d [drm:KMS:pid%d:%s] Unknown parameter %d i915 taskq[drm:KMS:pid%d:%s] hw status page @ %p error: [drm:pid%d:%s] *ERROR* GPU hanging too fast, declaring wedged! i915_resetdrm.i915.try_resetIntel i945GMIntel i946GZerror: [drm:pid%d:%s] *ERROR* Already pinned in i915_gem_pin_ioctl(): %d i915_gem_execbufferinfo: [drm] hint: you may be able to increase stolen memory size in the BIOS to avoid this error: [drm:pid%d:%s] *ERROR* INSTPM: 0x%08x i915_hangcheck_ring_idlegm45_get_vblank_countersnb_gt_irq_handlererror: [drm:pid%d:%s] *ERROR* pipe_off wait timed out error: [drm:pid%d:%s] *ERROR* WARN ON: !crtcintel_modeset_check_stateintel_sbi_write[drm:KMS:pid%d:%s] Unknown DPLL mode %08x in programmed mode intel_connector_check_stateerror: [drm:pid%d:%s] *ERROR* encoder->connectors_active not set info: [drm] applying inverted panel brightness quirk [drm:KMS:pid%d:%s] Mode for pipe %d: error: [drm:pid%d:%s] *ERROR* FDI TX PLL assertion failure, should be active but is disabled [drm:KMS:pid%d:%s] Writing base %08X %08lX %d %d %d error: [drm:pid%d:%s] *ERROR* WARN ON: I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT[drm:KMS:pid%d:%s] FDI_RX_IIR 0x%x [drm:KMS:pid%d:%s] ELD on pipe %c [drm:KMS:pid%d:%s] HDMI audio: pin eld vld status=0x%8x [drm:KMS:pid%d:%s] probing DP_B [drm:KMS:pid%d:%s] probing DP_C intel_dp_start_link_trainironlake_wait_panel_statusInteldrmn/intel_iicbb OBUF_0U: 0x%08x OTILEOFF_0Y: 0x%08x error: [drm:pid%d:%s] *ERROR* WARN ON: IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE)intel_update_fbc[drm:KMS:pid%d:%s] Sandybridge: deep RC6 disabled [drm:KMS:pid%d:%s] Failed to read display plane latency. Disable CxSR error: [drm:pid%d:%s] *ERROR* bad pxval: %ld [drm:KMS:pid%d:%s] watermark %d: display plane %d, fbc lines %d, cursor %d ivybridge_update_wmSDVO_CMD_SET_INPUT_TIMINGS_PART1SDVO_CMD_GET_OUTPUT_TIMINGS_PART2SDVO_CMD_GET_MAX_VPOSSDVO_CMD_GET_VPOSSDVO_CMD_SET_HUE[drm:KMS:pid%d:%s] %s detected on %s, addr %d [drm]:KMS:pid%d:%s]VR88: 0x%04x ns2501_writeb[drm:KMS:pid%d:%s] %s: switching to 640x480 [drm]:KMS:pid%d:%s]NS2501_FREQ_HI: 0x%02x sil164_dump_regstfp410_dump_regsi915_gem_hws_blti915_drpc_infois_haswell: %s (%s)No flip due on pipe %c (plane %c) Flip queued on pipe %c (plane %c) Time: %jd s %jd us SYNC_0: 0x%08x [last synced 0x%08x] disabled per module param (default off)ARB_MODE = 0x%08x bit9/bit10/bit11bit9/bit10/bit17PP_DIR_DCLV: 0x%08x i915_irq_emiti915_driver_loadis_i85x,is_ivybridge,overlay_needs_physical,[drm:KMS:pid%d:%s] load hws at %p [drm:KMS:pid%d:%s] Found PatherPoint PCH drm.i915.semaphoresIntel Haswell (CRW GT1 mobile)Intel G41U32:vendor;U32:device;P:#;D:#error: [drm:pid%d:%s] *ERROR* object 0x%08x [fenceable? %d] not 1M or pot-size (0x%08x) aligned i915_gem_wire_pageerror: [drm:pid%d:%s] *ERROR* GT error interrupt 0x%08x [drm:KMS:pid%d:%s] PCH transcoder B underrun interrupt i8xx_irq_handlerinfo: [drm] WRPLL: using settings for %dKHz on %dKHz mode error: [drm:pid%d:%s] *ERROR* Unexpected DP lane count %d [drm:KMS:pid%d:%s] DP audio: write eld information [drm:KMS:pid%d:%s] HDMI audio: write eld information intel_connector_dpmsassert_plane[drm:KMS:pid%d:%s] downclocking LVDS intel_decrease_pllclockerror: [drm:pid%d:%s] *ERROR* crtc not enabled info: [drm] Backlight polarity reversed on %s [drm:KMS:pid%d:%s] switching PLL %x off error: [drm:pid%d:%s] *ERROR* PCH VGA enabled on transcoder %c, should be disabled [drm:KMS:pid%d:%s] ELD on port %c error: [drm:pid%d:%s] *ERROR* failed to attach phys object [drm:KMS:pid%d:%s] [CRTC:%d] [NOFB] i915_redisable_vgaintel_dp_link_downtfp410g4x_write_infoframevlv_write_infoframeerror: [drm:pid%d:%s] *ERROR* bbbus bridge doesn't have iicbus grandchild error: [drm:pid%d:%s] *ERROR* gmbus bridge %d attach failed, %d error: [drm:pid%d:%s] *ERROR* WARN ON: !intel_gmbus_is_port_valid(port)info: [drm] GMBUS [%s] timed out, falling back to bit banging on pin %d [drm:KMS:pid%d:%s] ACPI OpRegion not supported! [drm:pid%d:%s] userspace bug: no overlay OSTART_0U: 0x%08x __gen6_gt_wait_for_fifo[drm:KMS:pid%d:%s] FBC idle timed out intel_init_render_ring_buffererror: [drm:pid%d:%s] *ERROR* Failed to allocate ringbuffer [drm]:KMS:pid%d:%s]... failed intel_sdvo_write_infoframePAL_DSECAM_B[drm:KMS:pid%d:%s] ivch detect failed due to address mismatch (%d vs %d) i915_emon_status dirty%d prepares YVideo Turbo Mode: %s RC6 Enabled: %s Unknown i915_min_freqerror: [drm:pid%d:%s] *ERROR* called with no initialization supports_tv,error: [drm:pid%d:%s] *ERROR* can not ioremap virtual address for ring buffer i915_set_status_pagei915_write64Intel Haswell (SDV GT2 server)Intel Haswell (CRW GT1 server)Intel E7221 (i915)error: [drm:pid%d:%s] *ERROR* Reenabling wedged hardware, good luck i915_gem_execbuffer_relocate_entry[drm:KMS:pid%d:%s] found %d bytes of stolen memory at %08lx i915_setup_compressionvalleyview_irq_handler_DSM[drm:KMS:pid%d:%s] No eDP BDB found but eDP panel supported. [drm:KMS:pid%d:%s] CRT detected via hotplug hsw_fdi_link_train[drm:KMS:pid%d:%s] No pipe for ddi port %i found error: [drm:pid%d:%s] *ERROR* LCPLL is disabled error: [drm:pid%d:%s] *ERROR* Programming port %c in FDI mode, this probably will not work. [drm:KMS:pid%d:%s] HDMI audio on pipe %c on DDI error: [drm:pid%d:%s] *ERROR* WARN ON: !HAS_PCH_SPLIT(dev)error: [drm:pid%d:%s] *ERROR* mode set failed: pipe %d stuck error: [drm:pid%d:%s] *ERROR* crtc's computed active state doesn't match tracked active state (expected %i, found %i) [drm:pid%d:%s] unsupported pixel format 0x%08x [drm:KMS:pid%d:%s] %d display pipe%s available. [drm:KMS:pid%d:%s] Pipe %c using transcoder EDP CONF: %08x [drm:KMS:pid%d:%s] has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d has_ck505 %d assert_transcoder_disabled[drm:KMS:pid%d:%s] FDI train 1 done, level %i. intel_set_config_compute_mode_changesironlake_edp_panel_vdd_offironlake_edp_backlight_offerror: [drm:pid%d:%s] *ERROR* failed to get link status intel_dp_check_edperror: [drm:pid%d:%s] *ERROR* dp_aux_ch not started status 0x%08x intel_enable_dpvgaAopen i945GTt-VFASupermicro X7SPA-H UV_VPH: 0x%08x error: [drm:pid%d:%s] *ERROR* failed to enable ironlake power power savings error: [drm:pid%d:%s] *ERROR* failed to set-domain on power context: %d i8xx_disable_fbcsandybridge_update_sprite_wm[drm:KMS:pid%d:%s] You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV) intel_sdvo_initSDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2SDVO_CMD_SET_OVERSCAN_HSDVO_CMD_SET_OVERSCAN_VSDVO_CMD_GET_HBUF_INFOSDVO_CMD_GET_HBUF_TXRATENot supportedPAL_G[drm:KMS:pid%d:%s] CH7017_OUTPUTS_ENABLE: %02x [drm:KMS:pid%d:%s] ch7xxx not detected; got 0x%02x from %s slave %d. [drm]:KMS:pid%d:%s]VR30: 0x%04x [drm]:KMS:pid%d:%s]VR83: 0x%04x [drm]:KMS:pid%d:%s]VR8E: 0x%04x i915_gem_requesti915_gen6_forcewake_count_info Render IMR: %08x 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x FORCEWAKE: 0x%08x fence[%d] = %08jx w/ctx: %d, w/o ctx: %d RPSTAT1: 0x%08x RC6+ residency since boot: %u DISP_ARB_CTL = 0x%08x DPIO_REFSFR_B: 0x%08x intel_alloc_mchbar_resourceerror: [drm:pid%d:%s] *ERROR* dev: %p error: [drm:pid%d:%s] *ERROR* Unclaimed write to %x drm.i915.panel_ignore_lidvgapciIntel SandyBridgeIntel Haswell (GT1 mobile)Intel i965GME/GLEi915_gem_attach_phys_objecterror: [drm:pid%d:%s] *ERROR* WARN ON: !ring->irq_get(ring)[drm:pid%d:%s] Invalid object handle %d at index %d [drm:pid%d:%s] Attempting to use self-modifying batch buffer error: [drm:pid%d:%s] *ERROR* Couldn't idle GPU [drm:KMS:pid%d:%s] FBC base 0x%08lx, ll base 0x%08lx, size %dM kick_ring[drm:pid%d:%s] Parity error: Row = %d, Bank = %d, Sub bank = %d. [drm:KMS:pid%d:%s] pipe %c underrun [drm:KMS:pid%d:%s] hotplug event received, stat 0x%08x [drm:KMS:pid%d:%s] aux/dc mux info: %s parse_general_features[drm:KMS:pid%d:%s] SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d [drm:KMS:pid%d:%s] Maybe one SDVO port is shared by two SDVO device. [drm:KMS:pid%d:%s] Using WRPLL 1 on pipe %c error: [drm:pid%d:%s] *ERROR* Invalid encoder type %d for pipe %d [drm:KMS:pid%d:%s] creating tmp fb for load-detection offintel_get_pch_pllassert_fdi_rx[drm:KMS:pid%d:%s] invalid fdi lane config on pipe %i: %i lanes [drm:KMS:pid%d:%s] LPT detected: skipping PCH PLL test [drm:KMS:pid%d:%s] DP link bw required %i available %i [drm:KMS:pid%d:%s] eDP was not running [drm:KMS:pid%d:%s] Channel EQ done. DP Training successful error: [drm:pid%d:%s] *ERROR* Timed out waiting for DP idle patterns intel_dp_detect[drm:KMS:pid%d:%s] aux_ch native nack intel_hdmi_mode_set[drm:KMS:pid%d:%s] LVDS downclock is found in EDID. Normal clock %dKhz, downclock %dKhz SCLRKEN: 0x%08x OSTART_0Y: 0x%08x OTILEOFF_0U: 0x%08x [drm:KMS:pid%d:%s] fbc watermark(%d) is too large(%d), disabling wm%d+ [drm:KMS:pid%d:%s] failed to compute sprite lp3 wm on pipe %d i9xx_get_fifo_sizeerror: [drm:pid%d:%s] *ERROR* Timed out waiting for forcewake to ack request. gen6_ring_syncSDVO_CMD_GET_SATURATIONSDVO_CMD_GET_MAX_OVERSCAN_HSDVO_CMD_SET_DOT_CRAWLPower on[drm:KMS:pid%d:%s] flicker_filter_2d: max %d, default %d, current %d 640x480848x4801280x7201920x1080ch7018[drm:KMS:pid%d:%s] Registers after mode setting [drm:KMS:pid%d:%s] CH7017_LVDS_CONTROL_2: %02x CH7009B[drm]:KMS:pid%d:%s]VR00: 0x%04x [drm]:KMS:pid%d:%s]VR81: 0x%04x sil164_writebYTotal fences = %d %s --- %d requests INSTPS: 0x%08x RC PSMI: 0x%08x waiting: %s XRC1E self-refresh: %s PP_DIR_BASE: 0x%08x userirq915dpihas_force_wake,[drm:KMS:pid%d:%s] Found LynxPoint LP PCH drm.i915.enable_fbcIntel Haswell (GT1 desktop)Intel i852GM/i855GM GMCHi915gemerror: [drm:pid%d:%s] *ERROR* bo is already pinned with incorrect alignment: offset=%x, req.alignment=%x, req.map_and_fenceable=%d, obj->map_and_fenceable=%d i830_write_fence_regerror: [drm:pid%d:%s] *ERROR* Scratch setup failed error: [drm:pid%d:%s] *ERROR* page table error [drm:KMS:pid%d:%s] pipe %c FDI IIR: 0x%08x ibx_irq_handlerHDMI/DVI_D[drm:KMS:pid%d:%s] crt_ddc_bus_pin: %d parse_general_definitionsintel_ironlake_crt_detect_hotplug[drm:KMS:pid%d:%s] Disabling SPLL error: [drm:pid%d:%s] *ERROR* encoder's stage crtc doesn't match current crtc error: [drm:pid%d:%s] *ERROR* FDI mPHY reset de-assert timeout error: [drm:pid%d:%s] *ERROR* WARN ON: !encoder->base.crtcassert_pch_refclk_enabledassert_pch_hdmi_disabled[drm:KMS:pid%d:%s] HDMI audio: enable codec ironlake_edp_panel_offerror: [drm:pid%d:%s] *ERROR* Need VDD to turn off panel error: [drm:pid%d:%s] *ERROR* eDP powered off while attempting aux channel communication. error: [drm:pid%d:%s] *ERROR* WARN ON: (I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0[drm:KMS:pid%d:%s] using preferred mode from EDID: Apple Mac Mini (Core 2 series)error: [drm:pid%d:%s] *ERROR* timed out waiting for panel to power off [drm:KMS:pid%d:%s] non asle set request?? intel_setup_overlay HORZ_PH: 0x%08x [drm:KMS:pid%d:%s] get backlight PWM = %d [drm:KMS:pid%d:%s] framebuffer too large, disabling compression mchdevSDVO_CMD_GET_HOT_PLUG_SUPPORTSDVO_CMD_SET_CONTRASTintel_sdvo_create_enhance_property_tv[drm:KMS:pid%d:%s] hue: max %d, default %d, current %d [drm:KMS:pid%d:%s] brightness: max %d, default %d, current %d 1080i@60Hz[drm:KMS:pid%d:%s] CH7017_VERTICAL_ACTIVE_LINE_OUTPUT: %02x CH7301i915_gem_active %u [%u] inactive objects, %zu [%zu] bytes Pinned[drm:KMS:pid%d:%s] Resetting error state P%02dVIDFREQ: 0x%08x (VID: %d) DPIO_DIV_A: 0x%08x error: [drm:pid%d:%s] *ERROR* failed to init modeset cursor_needs_physical,i915_flip_bufsi915_write8kernelIntel IvyBridge (M)Intel Haswell (ULT GT2 desktop)Intel Valleyview (mobile)Intel i865G GMCHIntel Eaglelakei915_gem_wait_for_error__wait_seqno915gwrerror: [drm:pid%d:%s] *ERROR* Failed to initialize GTT i915_error_work_funci915_get_crtc_scanoutpos[drm:KMS:pid%d:%s] failed to evaluate _DSM: %d HDMI/DVI_B[drm:KMS:pid%d:%s] Set default to SSC at %dMHz parse_sdvo_device_mapping[drm:KMS:pid%d:%s] Using SPLL on pipe %c intel_ddi_enable_pipe_funcerror: [drm:pid%d:%s] *ERROR* active crtc, but not enabled in sw tracking intel_crtc_update_sareaerror: [drm:pid%d:%s] *ERROR* PLL[%d] not attached to this transcoder %d: %08x [drm:KMS:pid%d:%s] Mode for pipe %c: i9xx_update_planegen6_fdi_link_trainerror: [drm:pid%d:%s] *ERROR* failed to release fence for cursorerror: [drm:pid%d:%s] *ERROR* WARN ON: !set->fb && (set->num_connectors != 0)DPDDC-Dironlake_wait_panel_off[drm:KMS:pid%d:%s] Sink OUI: %02x%02x%02x [drm:KMS:pid%d:%s] no scaling not supported iicbb_intel_iicbbDell Studio Hybridintel_opregion_setup[drm:KMS:pid%d:%s] ASLE supported FASTHSCALE: 0x%08x gen6_set_rpsintel_init_emon[drm:KMS:pid%d:%s] enabled fbc on plane %d SDVO_CMD_RESETSDVO_CMD_GET_SUPPORTED_POWER_STATESSDVO_CMD_SET_CONTROL_BUS_SWITCHSDVO_CMD_GET_MAX_CONTRASTleft_margin576pi915_capabilitiesi915_gem_hws_bsdi915_inttoext_table %d @ %d No requests Kernel: %s PGTBL_ER: 0x%08x %s [%d]: RC6++ residency since boot: %u FBC unsupported on planeunknown reasondisablederror: [drm:pid%d:%s] *ERROR* Bad box %d,%d..%d,%d i915_dma_resumeerror: [drm:pid%d:%s] *ERROR* can not ioremap virtual address for G33 hw status page error: [drm:pid%d:%s] *ERROR* DRM not initialized, aborting suspend. Intel Q35Intel i830M GMCH915unmi915_gem_free_object[drm:KMS:pid%d:%s] HW context support initialized i915_gem_get_tilingparse_lfp_panel_data[drm:KMS:pid%d:%s] Ignore SDVO panel mode from BIOS VBT tables. [drm:KMS:pid%d:%s] the SDVO device with slave addr %2x is found on %s port [drm:KMS:pid%d:%s] CRT not detected via DDC:0x50 [EDID reports a digital panel] intel_wait_for_vblankerror: [drm:pid%d:%s] *ERROR* failed to update base address assert_pch_ports_disablederror: [drm:pid%d:%s] *ERROR* FDI train 2 fail! [drm:KMS:pid%d:%s] HDMI audio: audio conf: 0x%8x intel_gen7_queue_flip[drm:KMS:pid%d:%s] [CRTC:%d] [FB:%d] #connectors=%d (x y) (%i %i) [drm:KMS:pid%d:%s] modes are different, full mode set [drm:KMS:pid%d:%s] probing HDMI on SDVOB [drm:KMS:pid%d:%s] Something enabled VGA plane, disabling it [drm:KMS:pid%d:%s] DP link computation with max lane count %i max bw %02x pixel clock %iKHz [drm:KMS:pid%d:%s] mask %08x value %08x status %08x control %08x error: [drm:pid%d:%s] *ERROR* bbbus bridge doesn't have iicbb child DWINPOS: 0x%08x OSTART_1U: 0x%08x [drm:KMS:pid%d:%s] disabling active FBC for update ironlake_update_wm[drm:KMS:pid%d:%s] Setting FIFO watermarks - A: %d i830_update_wmSDVO_CMD_SET_INPUT_TIMINGS_PART2SDVO_CMD_SET_CLOCK_RATE_MULTSDVO_CMD_GET_TV_CHROMA_FILTERintel_sdvo_init_ddc_proxyinfo: [drm] Setting output timings on %s failed PAL_NSECAM_G[drm:KMS:pid%d:%s] ch701x not detected, got %d: from %s slave %d. sil164_initi915_gem_pinnedi915_ring_freq_tablei915_sr_statusPCI ID: 0x%04x RP PREV DOWN: %dus RC6++ voltage: %dmV GFX power: %ld i915_cache_sharingerror: [drm:pid%d:%s] *ERROR* copy_to_user [drm:KMS:pid%d:%s] i915 device info: gen=%i, pciid=0x%04x flags=%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%sis_mobile,[drm:KMS:pid%d:%s] Enabled hardware status page [drm:KMS:pid%d:%s] irq_nr=%d breadcrumb=%d [drm:pid%d:%s] Simulated gpu hang, resetting stop_rings drm.i915.enable_ppgttvgapci/i915kmsIntel Haswell (ULT GT1 server)Intel G33error: [drm:pid%d:%s] *ERROR* Not pinned by caller in i915_gem_pin_ioctl(): %d [drm:KMS:pid%d:%s] Default HW context loaded [drm:KMS:pid%d:%s] Audio CP change interrupt [drm:KMS:pid%d:%s] PCH transcoder audio interrupt [drm:KMS:pid%d:%s] PCH transcoder CRC done interrupt [drm:KMS:pid%d:%s] Using VBT from OpRegion: %20s [drm:KMS:pid%d:%s] ironlake hotplug adpa=0x%x, result %d error: [drm:pid%d:%s] *ERROR* %d encoders on crtc for pipe %d [drm:KMS:pid%d:%s] no pipe available for load-detect error: [drm:pid%d:%s] *ERROR* WARN ON: !crtc->enabled[drm:KMS:pid%d:%s] enabling PCH PLL %x error: [drm:pid%d:%s] *ERROR* PCH DP (0x%08x) enabled on transcoder %c, should be disabled error: [drm:pid%d:%s] *ERROR* FDI train 1 fail! [drm:KMS:pid%d:%s] FDI train 2 done. [drm:KMS:pid%d:%s] FDI train 2 done, level %i. [drm:KMS:pid%d:%s] port num:%d [drm:KMS:pid%d:%s] crtc has no fb, full mode set [drm:KMS:pid%d:%s] failed to write sink power state [drm:KMS:pid%d:%s] training pattern 1 signal levels %08x DPDDC-C[drm:KMS:pid%d:%s] Wait for panel power on intel_dp_init_panel_power_sequencer[drm:KMS:pid%d:%s] aux_ch failed %d error: [drm:pid%d:%s] *ERROR* dp pll on, should be off assert_hdmi_port_disableden_DOD[drm:KMS:pid%d:%s] memory self refresh disabled info: [drm] Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s error: [drm:pid%d:%s] *ERROR* Failed to allocate status page init_ring_common[drm:KMS:pid%d:%s] I2c transfer returned %d [drm]:KMS:pid%d:%s] [drm]:KMS:pid%d:%s] SDVO_CMD_SET_OUTPUT_TIMINGS_PART2info: [drm] Setting input timings on %s failed [drm:KMS:pid%d:%s] writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i [drm:KMS:pid%d:%s] First %s output reported failure to sync PAL_60[drm:KMS:pid%d:%s] contrast: max %d, default %d, current %d [drm:KMS:pid%d:%s] tv_chroma_filter: max %d, default %d, current %d NTSC-Jch7017[drm]:KMS:pid%d:%s]VR01: 0x%04x Li915_gem_inactiveGraphics Interrupt identity: %08x %08x %8u %04x %04x %x %x%s%s%s%s%s%s%sRC7 Current RS state: bit9/bit10bit9/bit11GFX_MODE: 0x%08x unsupported DPIO_CORE_CLK_A: 0x%08x error: [drm:pid%d:%s] *ERROR* DRM_COPY_TO_USER failed i915_irq_waiti915_write16Intel Haswell (SDV GT2 desktop)Intel i945GMEMobile Intel® GM45 Express Chipseterror: [drm:pid%d:%s] *ERROR* Attempting to pin a purgeable buffer i915_gem_pin_ioctl[drm:pid%d:%s] 0x%x was already programmed to %x i915_gem_context: Unsupported Intel GPU generation %d[drm:pid%d:%s] reloc with multiple write domains: obj %p target %d offset %d read %08x write %08x[drm:KMS:pid%d:%s] resetting chip [drm:KMS:pid%d:%s] Audio CP request interrupt DisplayPort_Bintel_ddi_pll_initFDIintel_ddi_mode_seterror: [drm:pid%d:%s] *ERROR* encoder's active_connectors set, but no crtc error: [drm:pid%d:%s] *ERROR* crtc's computed enabled state doesn't match tracked enabled state (expected %i, found %i) [drm:KMS:pid%d:%s] plane %d init failed: %d error: [drm:pid%d:%s] *ERROR* plane %c assertion failure, should be off on pipe %c but is still active error: [drm:pid%d:%s] *ERROR* PLL[%d] not %s on this transcoder %d: %08x g4x_write_eldintel_crtc_init[drm:KMS:pid%d:%s] PCH_PP_STATUS: 0x%08x PCH_PP_CONTROL: 0x%08x [drm:KMS:pid%d:%s] CP or sink specific irq unhandled ironlake_wait_panel_power_cycle[drm:KMS:pid%d:%s] DPCD: %s error: [drm:pid%d:%s] *ERROR* aux_ch invalid native reply 0x%02x AOpen i915GMm-HFSClientron U800error: [drm:pid%d:%s] *ERROR* Can't support LVDS on pipe A INIT_PHS: 0x%08x OCONFIG: 0x%08x OCMD: 0x%08x intel_panel_get_backlight[drm:pid%d:%s] failed to alloc power context, RC6 disabled [drm:KMS:pid%d:%s] self-refresh watermark: display plane %d cursor %d [drm:KMS:pid%d:%s] Failed to set the min frequency error: [drm:pid%d:%s] *ERROR* Couldn't fix incorrect rc6 voltage intel_init_ring_bufferintel_sdvo_debug_writeSDVO_CMD_GET_MAX_HUESDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVESDVO_CMD_GET_AUDIO_ENCRYPT_PREFERPending[drm:KMS:pid%d:%s] connector_is_digital? %d, monitor_is_digital? %d [drm:KMS:pid%d:%s] sharpness: max %d, default %d, current %d [drm:KMS:pid%d:%s] Registers before mode setting ivch_init[drm]:KMS:pid%d:%s]VR86: 0x%04x [drm:KMS:pid%d:%s] init ns2501 dvo controller successfully! [drm]:KMS:pid%d:%s]TFP410_CTL1: 0x%02X i915_gem_pageflipi915_gem_hwsis_broadwater: %s is_crestline: %s has_hotplug: %s Total %d objects, %zu bytes, %zu GTT size %pK: %s%s %8zdKiB %04x %04x %d %d %d%s%s%sPort hotplug: %08x Active%s command stream: CTL: 0x%08x ring->head: 0x%08x Current P-state: %d no P-state info available FBC enabled FBC disabled: DDC = 0x%08x DPIO_CORE_CLK_B: 0x%08x DPIO_FASTCLK_DISABLE: 0x%08x i915_dispatch_batchbufferis_i915g,[drm:KMS:pid%d:%s] unknown parameter %d drm.i915.enable_rc6i915kms_vgapciIntel Haswell (SDV GT2 mobile)Intel Haswell (CRW GT1 desktop)Intel Q45/Q43error: [drm:pid%d:%s] *ERROR* object 0x%08x not 512K or pot-size 0x%08x aligned error: [drm:pid%d:%s] *ERROR* Couldn't read from MCHBAR. Disabling tiling. i915_gem_object_save_bit_17_swizzle[drm:KMS:pid%d:%s] Connector id: 0x%016llx ReservedDisplayPort_C[drm:KMS:pid%d:%s] VBT initial LVDS value %x intel_pin_and_fence_fb_objPlane [%d]: [drm:KMS:pid%d:%s] clamping display bpc (was %d) to LVDS (%d) [drm:KMS:pid%d:%s] CRTC:%d sharing existing PCH PLL %x (refcount %d, ative %d) [drm:KMS:pid%d:%s] eDP PLL enable for clock %d error: [drm:pid%d:%s] *ERROR* WARN ON: I915_READ(FDI_RX_CTL(PIPE_B)) & FDI_RX_ENABLEerror: [drm:pid%d:%s] *ERROR* asserting PCH PLL %s with no PLL error: [drm:pid%d:%s] *ERROR* PCH LVDS enabled on transcoder %c, should be disabled error: [drm:pid%d:%s] *ERROR* buffer is to small [drm:KMS:pid%d:%s] attempting to set mode from userspace [drm:KMS:pid%d:%s] crtc changed, full mode switch [drm:KMS:pid%d:%s] No PCH PLLs on this hardware, skipping initialisation drm_msleep[drm:KMS:pid%d:%s] panel power up delay %d, power down delay %d, power cycle delay %d error: [drm:pid%d:%s] *ERROR* dp port still on, should be off Dell OptiPlex FX170intel_enable_lvds[drm:KMS:pid%d:%s] bclp = 0x%08x asle_set_backlightinfo: [drm] initialized overlay support SWIDTHSW: 0x%08x OTILEOFF_1V: 0x%08x [drm:KMS:pid%d:%s] framebuffer not tiled or fenced, disabling compression [drm:pid%d:%s] gpu busy, RCS change rejected [drm:KMS:pid%d:%s] cancelling pending FBC enable error: [drm:pid%d:%s] *ERROR* WARN ON: signaller->semaphore_register[waiter->id] == MI_SEMAPHORE_SYNC_INVALIDerror: [drm:pid%d:%s] *ERROR* Failed to allocate seqno page SDVO_CMD_GET_IN_OUT_MAPSDVO_CMD_SET_TARGET_OUTPUTSDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1SDVO_CMD_GET_MAX_BRIGHTNESSSDVO_CMD_GET_OVERSCAN_VSDVO_CMD_GET_FLICKER_FILTER_2DSDVO_CMD_GET_MAX_SHARPNESSSDVO_CMD_GET_COLORIMETRY[drm:KMS:pid%d:%s] flicker_filter: max %d, default %d, current %d ch7017_mode_set[drm:KMS:pid%d:%s] CH7017_LVDS_PLL_FEEDBACK_DIV: %02x ch7xxx_readb[drm]:KMS:pid%d:%s]NS2501_FREQ_LO: 0x%02x i915_gem_wired_pagesi915_gem_gtti915_gfxecis_i915g: %s %u fault mappable objects, %zu bytes %zu [%zu] gtt total GPU freq (MHz) Effective CPU freq (MHz) 915rpshwi915_driver_unload915wfiIntel Haswell (GT1 server)create_hw_contexti915_gem_do_execbuffer[drm:KMS:pid%d:%s] AUX channel interrupt [drm:KMS:pid%d:%s] PCH transcoder A underrun interrupt i915_irq_handleri965_irq_handlerMUXed between iGPU and dGPUintel_crt_get_edidintel_ddi_get_crtc_encoder[drm:KMS:pid%d:%s] ELD on [CONNECTOR:%d:%s], [ENCODER:%d:%s] HBLANK: %08x SIZE: %08x [drm:KMS:pid%d:%s] Using SSC on eDP [drm:KMS:pid%d:%s] setting pipe bpc to %d (max display bpc %d) error: [drm:pid%d:%s] *ERROR* failed to disable transcoder %d error: [drm:pid%d:%s] *ERROR* IBX PCH dp port still using transcoder B i9xx_crtc_enableerror: [drm:pid%d:%s] *ERROR* unknown plane in flip command error: [drm:pid%d:%s] *ERROR* checking null crtc? [drm:KMS:pid%d:%s] Wait for panel power cycle [drm:KMS:pid%d:%s] backlight on delay %d, off delay %d error: [drm:pid%d:%s] *ERROR* aux_i2c invalid reply 0x%02x dpbAsus AT5NM10T-Iintel_lvds_mode_fixuperror: [drm:pid%d:%s] *ERROR* buffer used for overlay image can not be tiled UVSCALE: 0x%08x DCLRKV: 0x%08x [drm:KMS:pid%d:%s] set backlight PWM = %d [drm:KMS:pid%d:%s] RC6 and deep RC6 enabled error: [drm:pid%d:%s] *ERROR* MMIO read or write has been dropped %x [drm:KMS:pid%d:%s] fmax: %d, fmin: %d, fstart: %d ironlake_enable_drpsintel_sdvo_write_cmdSDVO_CMD_GET_SUPPORTED_TV_FORMATSSDVO_CMD_GET_POWER_STATESDVO_CMD_SET_DISPLAY_POWER_STATESDVO_CMD_SET_TV_CHROMA_FILTERSDVO_CMD_GET_SUPP_ENCODETarget not specifiedPAL[drm:KMS:pid%d:%s] Unable to read register 0x%02x from %s:0x%02x. [drm:KMS:pid%d:%s] Unable to write register 0x%02x to %s:%d %u unbound objects, %zu bytes purgeableFence %d, pin count = %d, object = PM IER: %08x RS2 VID: %d %s i915_emit_box[drm:KMS:pid%d:%s] error: [drm:pid%d:%s] *ERROR* Preliminary hardware support disabled Intel IvyBridge (S)Intel Valleyview (desktop)[drm:pid%d:%s] Relocation beyond object bounds: obj %p target %d offset %d size %d. i915_gem_execbuffer_relocate_slow[drm:KMS:pid%d:%s] display mux info: %s intel_parse_biosparse_sdvo_panel_data[drm:KMS:pid%d:%s] No SDVO device info is found in VBT [drm:KMS:pid%d:%s] No memory space for child device [drm:KMS:pid%d:%s] starting load-detect on CRT error: [drm:pid%d:%s] *ERROR* %d bpp unsupported by transcoder DDI function error: [drm:pid%d:%s] *ERROR* WARN ON: intel_crtc->ddi_pll_sel == PORT_CLK_SEL_NONE[drm:KMS:pid%d:%s] vblank wait timed out [drm:KMS:pid%d:%s] [CONNECTOR:%d:%s], [ENCODER:%d:%s] error: [drm:pid%d:%s] *ERROR* encoder's hw state doesn't match sw tracking (expected %i, found %i) CNTR: %08x Cursor [%d]: ironlake_init_pch_refclk[drm:KMS:pid%d:%s] Disabling SSC entirely error: [drm:pid%d:%s] *ERROR* wrong connector dpms state [drm:KMS:pid%d:%s] CRTC:%d using pre-allocated PCH PLL %x [drm:KMS:pid%d:%s] enabling CxSR downclocking intel_encoder_crtc_ok[drm:KMS:pid%d:%s] probing SDVOB [drm:KMS:pid%d:%s] [ENCODER:%d:%s] manually disabled 915iwpch7xxxerror: [drm:pid%d:%s] *ERROR* failed to pin fb: %d error: [drm:pid%d:%s] *ERROR* Writing DIP with CTL reg disabled panel_ADRdrm.i915.invert_brightnessintel_enable_rc6[drm:KMS:pid%d:%s] SR watermark: display plane %d, cursor %d intel_get_cxsr_latencypineview_update_wmg4x_update_wm[drm:KMS:pid%d:%s] self-refresh entries: %d SDVO_CMD_GET_INPUT_TIMINGS_PART2SDVO_CMD_GET_HBUF_INDEX[drm]:KMS:pid%d:%s] %02Xcontrasthuech7017_dump_regs[drm:KMS:pid%d:%s] ns2501 not detected got %d: from %s Slave %d. ns2501_init[drm:KMS:pid%d:%s] %s: Trying to re-enable the DVO has_fbc: %s has_llc: %s (%s mappable)Stall check waiting for page flip ioctl, Display IIR_RW: %08x Master IER: %08x Interrupt identity: %08x Interrupt mask: %08x South Display Interrupt identity: %08x seqno: 0x%08x SW control enabled: %s Deepest RC6 Enabled: %s RC6+ voltage: %dmV bit6 swizzle for X-tiling = %s DPIO_REFSFR_A: 0x%08x error: [drm:pid%d:%s] *ERROR* failed to map registers 915erri915_get_bridge_dev915wtqerror: [drm:pid%d:%s] *ERROR* WARN ON: !IS_HASWELL(dev)error: [drm:pid%d:%s] *ERROR* Failed to reset chip. iici915_gem_entervt_ioctli915_gem_lastclose[drm:KMS:pid%d:%s] HW context %d created BUGinfo: [drm] not enough stolen space for compressed buffer, disabling HDMI/DVI_C[drm:KMS:pid%d:%s] Found panel mode in BIOS VBT tables: intel_ddi_calculate_wrpll[drm:pid%d:%s] pitch (%d) must be at less than 32768 intel_modeset_initintel_modeset_setup_hw_stateerror: [drm:pid%d:%s] *ERROR* panel assertion failure, pipe %c regs locked [drm:KMS:pid%d:%s] clamping display bpc (was %d) to EDID reported max of %d error: [drm:pid%d:%s] *ERROR* no plane for crtc: plane %d, num_pipes %d error: [drm:pid%d:%s] *ERROR* FDI RX PLL assertion failure, should be active but is disabled error: [drm:pid%d:%s] *ERROR* FDI RX state assertion failure (expected %s, current %s) i9xx_crtc_mode_set[drm:KMS:pid%d:%s] HDMI: Haswell Audio initialize.... [drm:KMS:pid%d:%s] encoder changed, full mode switch [drm:KMS:pid%d:%s] %s: channel EQ not ok, retraining intel_gmbus_get_adapterMSI IM-945GSE-Aintel_disable_lvdsFull[drm:KMS:pid%d:%s] fbc disabled per module param sandybridge_pcode_writeironlake_disable_fbc[drm:KMS:pid%d:%s] FIFO watermarks For pipe A - plane %d, cursor: %d [drm:KMS:pid%d:%s] failed to compute sprite lp2 wm on pipe %d [drm:KMS:pid%d:%s] overclocking supported, adjusting frequency max to %dMHz init_status_page[drm:KMS:pid%d:%s] %s head not reset to zero ctl %08x head %08x tail %08x start %08x [drm:KMS:pid%d:%s] %s device VID/DID: %02X:%02X.%02X, clock range %dMHz - %dMHz, input 1: %c, input 2: %c, output 1: %c, output 2: %c drmn/intel_sdvo_ddc_proxy[drm]:KMS:pid%d:%s](%s)SDVO_CMD_GET_PIXEL_REPLISDVO_CMD_GET_COLORIMETRY_CAPSDVO_CMD_SET_AUDIO_STAT[drm]:KMS:pid%d:%s](??? %d)[drm:KMS:pid%d:%s] No enhancement is supported bottom_marginsaturationsharpnessbrightness720p@50Hzw5b%55r%%%%r'''r)))))))**B*..".2.B..BF"& VfRbZj" *&  "  *   &   "  *   &   "  *   & 0WU   0Ba1`! !!@! !P!  0!0!a aBF "&RVZbfj "&*     " & *      " & *      " & * UW0b%r%%%%r'''r)))))))**B*..".2.B..w555T 0@``s~ONT,LENOVO97027RGBddACERZGB_  ___  _ À _׀ &M& N0 R$U*U$Y$[((\]$a$Wb(!pbe$xiidolk`m"nn *NpHq6t 0ux)y {} ~ Є .(pj"X@ 4]Y.(,D,-+dlAȯ°4-(h1\PD 8" "&l -+&~(x(,` T 'H10%**       k& !:! S . .  p X @ ( ! !d[ " " +# $ % '( , 50 3 4 &6 8 h< <do>P@8D (G  H KLM N O +S W ,Y )[ [Z[ \ !_ xc `g .Hk 0o ($q s ,u 'v 'w z}*~-"%!pjX@%(.΢Llȩ1$[!?&t̹9"*P8 +(&.c' '*x)%`3%HB 60)+C* & )"%p =)XRo@>)(#(%"*".""&$(*.p02h6P:/J;8>1A BCCd[D!F0IMQR,U"Y5x]r^2f`-`aHe=#), &$(*(,%00h00b1P488 <@B&C.F#G+KO%S*T*~V"xW/`[,]1N^$H_$0c=ef!v%j&(\Bd BC^_t(MLV-98HJ0]s83('<6%y' b%w5F 9FMvB*%YB*%`B*%B*%B*%KNCR Corporation Ng5p Ng5P@  a =[  N =v[<, a =[  N\*Fx  b N\*FxP@  a0W0\`a0W0\`!a0W5O~  *na0W5O  8na0W5O~  pna0W5Ov  pna0W5QZ   a0W5O  Pn Apple Inc.MacBookPro8,28kg5h * N8g5h pUg5h P ag5h  wvg5al  o   `8`v `8`u`8`PPPP P$PAppleMacmini1,1AppleMacmini2,1MSIA9830IMSDell Inc.Studio Hybrid 140gDell Inc.OptiPlex FX170AOpeni965GMx-IF AOpen i915GMx-F AOpen i915GMm-HFS AOpen i45GMx-IAO00001JWClientronU800ClientronE830ASUSTeK Computer INC.EB1007 ASUSTeK Computer INC. AT5NM10T-I Hewlett-PackardHP t5740e Thin Client Hewlett-Packardhp t5745 Hewlett-Packardhp st5747 MICRO-STAR INTERNATIONAL CO., LTD MS-7469 Gigabyte Technology Co., Ltd. D525TUDSupermicroX7SPA-HFUJITSUESPRIMO Q90000 0@0@/00 .0, 0`+ 0 *` 0ീ( 0@? 0x<`@0 : @008@0x6 0@4` 0@2@ 0@`1 000`., h@+@ )`(`>(<9@7 64h`3న@2@1`000TT T5-o*&_ &hb5k*k \wqke                        5  /  ) #|vp jd|^vXpRjLdF^@X:  R4!!L.""F(##@"$$: % %4!&!&."'"'(# (#("$)$)%)%{*&*&u+'+'o, (,(i-)-)c.).{*]/*/u+W0+0o,Q1,1i-K2-2c.E3.3]/?4/4W09505Q13616K2-727E3'838?4!94995:5:36;6;-7<7<'8 =8=!9>9>:>:@@ @?@@?@@ @?@@?@@@@@ 6 f  J   C D   >ލH x, \5 : j&V/ 5e M}s ̄ f jmƐ ae n  R 1a  K {5 L|+[  Fv0 :d W s Aq^Q n<l υ ܂  ς֎ ʌ? @@?@ @@?@??@@ @?@_?@? _?  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